Realizing The Future Of 3D-IC Design


The integration of heterogeneous chiplet technology has fundamentally transformed semiconductor design, enabling the efficient creation of sophisticated system-in-packages by assembling pre-designed or third-party IP onto high-performance interposers and advanced packages. This approach offers significant advantages over traditional monolithic designs, including enhanced performance, improved p... » read more

Wafer-Scale vs. Chiplets: The New War? Part 2


In Part 1, we looked at the innovations underpinning the Cerebras WSE-3 and why its most significant breakthrough is the elimination of data movement overhead at the architectural level, not better yield management or thermal engineering. Cerebras’ on-wafer fabric is a viable answer to the question being asked by the entire industry: how do you move data fast enough that compute stops wait... » read more

Scaling ADAS To 10+ Cameras


By WonBae Bang, KiDong Sim, Weilung Lu, and Adrian Arcedera Introduction Advanced Driver Assistance Systems (ADAS) are increasingly adopted by automotive manufacturers to enhance driving safety. These systems help drivers in the driving process, thereby increasing car and road safety. ADAS technologies include features such as adaptive cruise control, lane departure warning and automatic emer... » read more

Automated 310mm Panel-Level Packaging to Accelerate AI Innovation: Tech Brief


This shift to panel-level packaging addresses critical industry challenges, including rising interposer sizes and declining wafer-level efficiency. The larger panel format supports higher throughput, reduced cycle time, and lower cost per package, while enabling integration of increasingly complex multi-die architectures. These benefits are especially impactful for AI data center and HPC applic... » read more

Making On-Chip Photonics Manufacturable


Key Takeaways: System-level energy and bandwidth pressures are pulling optics into the package faster than the manufacturing flow can mature. Photonics combines front-end fabrication, materials, thermal, cleanliness, and test into one problem that can’t be solved domain by domain. Test is moving upstream because discovering an optical failure after final assembly forfeits every goo... » read more

Mastering 3D-IC Verification Complexity


The semiconductor industry's transition from traditional 2D integrated circuits to 2.5D and 3D-IC configurations represents more than an incremental advancement. This architectural shift, driven by the need to push beyond conventional scaling limitations, introduces a cascade of verification challenges that legacy methodologies struggle to address. As designs incorporate multiple stacked dies, ... » read more

Packaging Technologies Redefine AI And HPC Scalability Limits At ECTC 2026


The 2026 IEEE Electronic Components and Technology Conference (ECTC) showcased how advanced packaging can redefine the scalability limits of artificial intelligence (AI) and high-performance computing (HPC). Across 20 technical papers, Intel Foundry engineers and collaborators highlighted breakthrough innovations — from Embedded Multi-die Interconnect Bridge-T (EMIB-T) enabling large multi-d... » read more

Deterministic, Solver-Accurate Thermal and Warpage Analysis at Manufacturing Resolution for Advanced 2.5D HBM Packages


Thermal management has become the defining bottleneck in high-performance computing (HPC) and AI accelerator packaging. Modern packages integrate high-power ASICs with multiple High Bandwidth Memory (HBM) stacks on a silicon interposer, creating tightly coupled thermal and mechanical interactions. Die-to-die thermal crosstalk elevates HBM junction temperatures, while coefficient of thermal e... » read more

Side-Channel Risks Across 2.5D/3D Integration and Chiplet-Based Systems (Grenoble INP – UGA et al.)


Researchers from Grenoble INP - UGA, CNRS, TIMA have released “Spying Across Chiplets: Side-Channel Attacks in 2.5/3D Integrated Systems”. Abstract “Advanced packaging and chiplet-based integration are increasingly adopted to build complex heterogeneous systems beyond the limits of monolithic scaling. While these architectures offer major benefits in terms of modularity, yield, a... » read more

Advancing Heterogeneous Integration Through Industry Roadmap Improvements


Heterogeneous integration requires comprehensive roadmaps to support collaboration across the design and manufacturing of the next generation of semiconductor products and the systems they support. A global team of researchers from a broad spectrum of industry, academia, and research institutes led by Intel has published a perspective in the March 2026 issue of Nature Reviews Electrical Enginee... » read more

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