Testing For Thermal Issues Becomes More Difficult


Increasingly complex and heterogeneous architectures, coupled with the adoption of high-performance materials, are making it much more difficult to identify and test for thermal issues in advanced packages. For a single SoC, compressing higher functionality into a smaller area concentrates the processing and makes thermal effects more predictable. But that processing can happen anywhere in a... » read more

Auto Chip Aging Accelerates In Hot Climates


Automotive chips are aging significantly faster than expected in hot climates with sustained high temperatures, raising concerns about the reliability of electrified vehicles over time and whether advanced-node chips are the right choice for safety-critical applications. Many of the most advanced electronics used in vehicles today are ASIL D-compliant, expected to function up to 125° C. But... » read more

The Evolution of HBM


High-bandwidth memory originally was conceived as a way to increase capacity in memory attached to a 2.5D package. It has since become a staple for all high-performance computing, in some cases replacing SRAM for L3 cache. Archana Cheruliyil, senior product marketing manager at Alphawave Semi, talks about how and where HBM is used today, how it will be used in the future, why it is essential fo... » read more

Critical Design Considerations For High-Bandwidth Chiplet Interconnects (TSMC)


A new technical paper titled "High-Bandwidth Chiplet Interconnects for Advanced Packaging Technologies in AI/ML Applications: Challenges and Solutions" was published by researchers at TSMC. Abstract: "The demand for chiplet integration using 2.5D and 3D advanced packaging technologies has surged, driven by the exponential growth in computing performance required by Artificial Intelligence a... » read more

Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification


In recent years there has been a sharp rise of multi-die system designs. Numerous publications targeting a large variety of applications exist in the public domain. One presentation [2] on the IEEE’s website does a good job of detailing the anecdotal path of multi-die systems by way of chiplet building blocks integrated within a single package [2]. The presentation includes references to a ha... » read more

FOPLP Gains Traction in Advanced Semiconductor Packaging


Fan-Out Panel-Level Packaging (FOPLP) for advanced nodes, once hindered by manufacturability and yield challenges, is emerging as a promising solution to meet the industry’s demands for higher integration densities and cost efficiency. Traditionally, FOPLP has been a go-to solution for cost-sensitive applications in consumer electronics, IoT devices, and mid-tier automotive systems. Its ab... » read more

One Chip Vs. Many Chiplets


Experts at the Table: Semiconductor Engineering sat down to discuss the growing list of challenges at advanced nodes and in advanced packages, with Jamie Schaeffer, vice president of product management at GlobalFoundries; Dechao Guo, director of advanced logic technology R&D at IBM; Dave Thompson, vice president at Intel; Mustafa Badaroglu, principal engineer at Qualcomm; and Thomas Ponnusw... » read more

Globally Asynchronous, Locally Synchronous Clocks


Typical IC clocking schemes are under stress in complex chip/chiplet designs, where multiple compute elements may not be operating at the same frequency consistently. Some cores may be powered down to save energy, or they may age at different rates, which in turn reduces performance. Lee Vick, vice president of strategic marketing at Movellus, explains why locally asynchronous clocking schemes ... » read more

Advanced Packaging Driving New Collaboration Across Supply Chain


The semiconductor industry is undergoing a profound shift in packaging technologies to ones that rely on close collaboration among multiple stakeholders to solve intricate, multi-faceted, and extraordinarily complex problems. At the heart of this change is the convergence of heterogeneous integration, chiplets, and 3D stacking. Heterogeneous approaches allow companies to combine different te... » read more

Revolutionizing IC Packaging With High-Density RDL Technology


The demand for high-performance devices, particularly in AI, HPC, and data centers, has surged dramatically in the ever-evolving landscape of integrated circuit technology. This demand has been further accelerated by the COVID-19 pandemic, pushing the boundaries of silicon technology to its limits. Enter Amkor’s S-SWIFT, a packaging solution designed to address these challenges and revolution... » read more

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