tag: advanced packaging

Dealing With ECOs In Complex Designs
By Ed Sperling - 22 Jan, 2020 - Comments: 0

Namsuk Oh, R&D principal engineer at Synopsys, talks about the impact of more corners and engineering change orders, how that needs to be addressed in the flow to close timing, and how dependencies can complicate any changes that are required. » read more

Non-Volatile Memory Tradeoffs Intensify
By Ann Steffora Mutschler - 22 Jan, 2020 - Comments: 0

Non-volatile memory is becoming more complicated at advanced nodes, where price, speed, power and utilization are feeding into some very application-specific tradeoffs about where to place that memory. NVM can be embedded into a chip, or it can be moved off chip with various types of interconnect technology. But that decision is more complicated than it might first appear. It depends on the ... » read more

How Chips Age
By Ed Sperling - 20 Jan, 2020 - Comments: 0

Andre Lange, group manager for quality and reliability at Fraunhofer IIS’ Engineering of Adaptive Systems Division, talks about circuit aging, whether current methods of predicting reliability are accurate for chips developed at advanced process nodes, and where additional research is needed. » read more

Moore’s Law, Supply Chains And Security
By Brian Bailey - 16 Jan, 2020 - Comments: 0

The debate about the future of Moore's Law continues, while other parts of the industry look for alternatives. In between, supply chains are being pulled in multiple directions, with safety and security often in the middle. All across the semiconductor industry, significant changes are underway. Some of these have been in the works for some time. Others are new or accelerating faster than an... » read more

Making 3D Structures And Packages More Reliable
By Ed Sperling - 14 Jan, 2020 - Comments: 0

The move to smaller vertical structures and complex packaging schemes is straining existing testing approaches, particularly in heterogeneous combinations on a single chip and in multi-die packages. The complexity of these devices has exploded with the slowdown in scaling, as chipmakers turn to architectural solutions and new transistor structures rather than just relying on shrinking featur... » read more

CEO Outlook: 2020 Vision
By Ed Sperling - 06 Jan, 2020 - Comments: 0

The start of 2020 is looking very different than the start of 2019. Markets that looked hazy at the start of 2019, such as 5G, are suddenly very much in focus. The glut of memory chips that dragged down the overall chip industry in 2019 has subsided. And a finely tuned supply chain that took decades to develop is splintering. A survey of CEOs from across the industry points to several common... » read more

What Engineers Are Reading And Watching
By Brian Bailey - 26 Dec, 2019 - Comments: 0

By Brian Bailey And Ed Sperling An important indicator of where the chip industry is heading is what engineers are reading and what videos they are watching. While some subjects remain on top, such as the level of interest in the latest manufacturing technologies, other areas come and go. The stories with the biggest traffic numbers are almost identical to last year. Readers want to know wh... » read more

What Worked, What Didn’t In 2019
By Brian Bailey - 19 Dec, 2019 - Comments: 1

2019 has been a tough year for semiconductor companies from a revenue standpoint, especially for memory companies. On the other hand, the EDA industry has seen another robust growth year. A significant portion of this disparity can be attributed to the number of emerging technology areas for semiconductors, none of which has reached volume production yet. Some markets continue to struggle, a... » read more

Scaling, Packaging, And Partitioning
By Ed Sperling - 17 Dec, 2019 - Comments: 0

Prior to the finFET era, most chipmakers either focused on shrinking or packaging, but they rarely did both. Going forward, the two will be inseparable, and that will lead to big challenges with partitioning of data and processing. The key driver here, of course, is that device scaling no longer provides appreciable benefits in power, performance and cost. Nevertheless, scaling does provide ... » read more

What’s Next For High Bandwidth Memory
By Mark LaPedus - 17 Dec, 2019 - Comments: 1

A surge in data is driving the need for new IC package types with more and faster memory in high-end systems. But there are a multitude of challenges on the memory, packaging and other fronts. In systems, for example, data moves back and forth between the processor and DRAM, which is the main memory for most chips. But at times this exchange causes latency and power consumption, sometimes re... » read more

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