The Impact Of EUV Resist Thickness On Via Patterning Uniformity


Via patterning at advanced nodes requires extremely low critical dimension (CD) values, typically below 30nm. Controlling these dimensions is a serious challenge, since there are many inherent sources of variation during lithography and etch processing. Coventor personnel, in conjunction with our colleagues from ASML and imec, recently looked at the impact of Extreme Ultraviolet lithography (EU... » read more

Week In Review: Manufacturing, Test


Chipmakers TrendForce has released its projected foundry rankings in terms of sales for the first quarter. TSMC is still in first place, followed by Samsung, GlobalFoundries and UMC. Samsung has been ramping up chips based on its 7nm logic process using extreme ultraviolet (EUV) lithography. Now, Samsung is ramping up its DRAM devices using EUV and plans to expand its capacity in the arena.... » read more

Improving EUV Process Efficiency


The semiconductor industry is rethinking the manufacturing flow for extreme ultraviolet (EUV) lithography in an effort to improve the overall process and reduce waste in the fab. Vendors currently are developing new and potentially breakthrough fab materials and equipment. Those technologies are still in R&D and have yet to be proven. But if they work as planned, they could boost the flo... » read more

Defect Evolution In Next Generation, Extreme Ultraviolet Lithography


Extreme ultraviolet (EUV) lithography is a promising next generation lithography technology that may succeed optical lithography at future technology nodes. EUV mask infrastructure and manufacturing of defect-free EUV mask blanks is a key near term challenge in the use of EUV lithography. Virtual fabrication is a computerized technique to perform predictive, three dimensional modeling of sem... » read more

Manufacturing Bits: March 3


Security lithography At the recent SPIE Advanced Lithography conference, Multibeam disclosed more details about its efforts to develop multi-beam direct-write lithography for chip security applications. David Lam, chief executive and chairman of Multibeam, described how multi-beam lithography can be used to help thwart IC counterfeiting and tampering in the market. This lithography technolo... » read more

Week In Review: Manufacturing, Test


SPIE At the SPIE Advanced Lithography conference, Lam Research has introduced a new dry resist technology for extreme ultraviolet (EUV) lithography. Dry resist technology is a new approach to deposit and develop EUV resists. It is a dry deposition technique with alternate compositions and mechanisms. By combining Lam’s deposition and etch process expertise with partnerships with ASML a... » read more

2020 IC Outlook: Uncertainty


After a downturn in 2019, the semiconductor and equipment industries looked promising at the start of 2020. In 2019, the downturn was primarily due to the memory markets, namely DRAM and NAND. Both DRAM and NAND saw lackluster demand and falling prices last year. At the start of 2020, though, the memory markets were beginning to recover. Unlike memory, the logic and foundry markets were s... » read more

Week In Review: Manufacturing, Test


Fab tools The United States is mulling over new trade export restrictions for U.S. fab equipment to China, according to a report from The Wall Street Journal. “Recent press reports suggest the U.S. Department of Commerce is exploring additional measures to limit Huawei's access to U.S. semiconductor capital equipment (SPE) by requiring chip manufacturing plants globally to procure license... » read more

The Risk Of Two Supply Chains


Ever since the Trump administration weaponized trade restrictions against individual companies — first ZTE, then Huawei — China has begun developing a second supply chain for electronics. Inside of China, this is viewed as a necessary step for survival. In April 2018, the U.S. government banned ZTE from sourcing U.S. components for seven years, nearly putting that company out of business... » read more

EDA In The Cloud


Michael White, director of product marketing for Calibre physical verification at Mentor, a Siemens Business, looks at the growing compute requirements at 7, 5 and 3nm, why the cloud looks increasingly attractive from a security and capacity standpoint, and how the cloud as well as new lithography will affect the cost and complexity of developing new chips. » read more

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