Research Bits: Sept. 16


Beyond-EUV resists Researchers from Johns Hopkins University, East China University of Science and Technology, École Polytechnique Fédérale de Lausanne (EPFL), Soochow University, Brookhaven National Laboratory, and Lawrence Berkeley National Laboratory propose a combination of new resist materials and a higher-powered EUV process that could enable smaller chip feature sizes. The "beyond... » read more

Reticle Stitching Bumps Up Silicon Interposer Costs


Advanced packaging often relies on silicon interposers to connect chiplets and other components inside a package. The problem is that interposers typically exceed the reticle limit, which adds both complexity and cost. An interposer is essential for 2.5D and 3.5D architectures. As device scaling runs out of steam, chipmakers are decomposing planar SoCs into chiplets and connecting them throu... » read more

GPU Acceleration Of Rigorous Lithography Simulations


Producing modern semiconductor devices is an immensely challenging process. Successful execution entails advanced process nodes, novel device architectures, new materials, and many fabrication steps. One especially challenging area is lithography, in which light is sent through a photomask, passes through a projection system of lenses and mirrors, and strikes the substrate to create the device ... » read more

Disruptive Changes Ahead For Photomasks?


Experts at the Table: Semiconductor Engineering sat down with four experts to explore the current state and future direction of mask-making, with insights from Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows ... » read more

Are Larger Reticle Sizes On The Horizon?


Making high-NA EUV lithography work will take a manufacturing-worthy approach to stitching together circuits or a wholesale change to larger masks. Circuit stitching between the exposure fields is challenging the design, yield and manufacturability of the high-NA (0.55) EUV transition. The alternative is a radical change from 6x6-inch to 6x11-inch masks that would eliminate stitching, but it... » read more

Reaction Mechanisms in a Chemically Amplified EUV Photoresist (imec, KU Leuven)


A new technical paper titled "Unraveling the Reaction Mechanisms in a Chemically Amplified EUV Photoresist from a Combined Theoretical and Experimental Approach" was published by researchers at imec and KU Leuven. "Our combined experimental and theoretical approach shows that EUV photoemission can simultaneously resolve chemical dynamics and the production of primary and secondary electrons,... » read more

EUV Lithography: The Resolution Capability And Stochastic Behavior From Statistical Viewpoints


A new technical paper titled "Statistics of EUV exposed nanopatterns: Photons to molecular dissolutions" was published by Hiroshi Fukuda, Hitachi High-Tech Corporation. Abstract "For higher computing power of semiconductor integrated circuits, pattern feature sizes below 10 nm are anticipated by introducing extreme ultraviolet (EUV) lithography with high numerical aperture (NA) optics. Ho... » read more

Photomask Changes And Challenges At Mature And Advanced Nodes


Experts at the Table: Semiconductor Engineering sat down to discuss the current state and future direction of mask-making, with Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows are excerpts of that conversation.... » read more

Mask Complexity, Cost, And Change


Experts at the Table: As leading-edge lithography nodes push further into EUV and beyond, mask-making has become one of the most critical and costly aspects of semiconductor manufacturing. At the same time, non-EUV applications are stretching the lifetime of older tools and processes, challenging the industry to find new solutions for both ends of the spectrum. Semiconductor Engineering sat dow... » read more

Laser-Focused Results: Improving EUV Line Edge Roughness With Ion Beam Etching


Extreme ultraviolet (EUV) lithography exposed resist patterns can exhibit excessive line edge roughness (LER) and line width roughness (LWR) due to random or shot noise. Increasing the EUV exposure dose can reduce LER/LWR, but it also decreases wafer throughput, which is highly undesirable given the EUV tool’s high operating costs. Ion beam etching (IBE) can directionally etch away roug... » read more

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