Research Bits: April 23


Probabilistic computer prototype Researchers at Tohoku University and the University of California Santa Barbara created a prototype of a heterogeneous probabilistic computer that combines a CMOS circuit with a limited number of stochastic nanomagnets. It aims to improve the execution of probabilistic algorithms used to solve problems where uncertainty is inherent or where an exact solution... » read more

Electromigration Concerns Grow In Advanced Packages


The incessant demand for more speed in chips requires forcing more energy through ever-smaller devices, increasing current density and threatening long-term chip reliability. While this problem is well understood, it's becoming more difficult to contain in leading-edge designs. Of particular concern is electromigration, which is becoming more troublesome in advanced packages with multiple ch... » read more

What Works Best For Chiplets


The semiconductor industry is preparing for the migration from proprietary chiplet-based systems to a more open chiplet ecosystem, in which chiplets fabricated by different companies of various technologies and device nodes can be integrated in a single package with acceptable yield. To make this work as expected, the chip industry will have to solve a variety of well-documented technical an... » read more

Powering The Automotive Revolution: Advanced Packaging For Next-Generation Vehicle Computing


Automotive processors are rapidly adopting advanced process nodes. NXP announced the development of 5 nm automotive processors in 2020 [1], Mobileye announced EyeQ Ultra using 5 nm technology during CES 2022 [2], and TSMC announced its “Auto Early” 3 nm processes in 2023 [3]. In the past, the automotive industry was slow to adopt the latest semiconductor technologies due to reliability conc... » read more

Advanced Packaging Design For Heterogeneous Integration


As device scaling slows down, a key system functional integration technology is emerging: heterogeneous integration (HI). It leverages advanced packaging technology to achieve higher functional density and lower cost per function. With the continuous development of major semiconductor applications such as AI HPC, edge AI and autonomous electrical vehicles, traditional chips are transforming i... » read more

Challenges With Chiplets And Power Delivery


Chiplets hold the potential to deliver the same PPA benefits as an SoC, but with many more features and options that are possible on a reticle-constrained die. If chiplets live up to the hype, they will deliver what is essentially mass customization, democratizing and speeding the delivery of complex chips across a broad array of markets. Today, the focus has been on die-to-die interfaces, but ... » read more

Architecting Chips For High-Performance Computing


The world’s leading hyperscaler cloud data center companies — Amazon, Google, Meta, Microsoft, Oracle, and Akamai — are launching heterogeneous, multi-core architectures specifically for the cloud, and the impact is being felt in high-performance CPU development across the chip industry. It's unlikely that any these chips will ever be sold commercially. They are optimized for specific ... » read more

NoCs In 3D Space


A network on chip (NoC) has become an essential piece of technology that enables the complexity of chips to keep growing, but when designs go 3D, or when third-party chiplets become pervasive, it's not clear how NoCs will evolve or what the impact will be on chiplet architectures. A NoC enables data to move between heterogeneous computing elements, while at the same time minimizing the resou... » read more

Jumpstarting The Automotive Chiplet Ecosystem


The automotive industry stands on the cusp of a technological renaissance, ushering in an era where vehicles aren't just tools of transportation, but interconnected nodes within a vast network of software-defined mobility. Central to this transformation is the concept of chiplets—miniaturized, modular components that can be mixed, matched, and scaled to create powerful, application-specific i... » read more

Cost And Quality Of Chiplets


Chiplets add a whole new challenge for the semiconductor industry. How much testing is enough? How do you optimize system binning? What’s the right amount of burn-in? The answers to these questions will vary, depending upon cost and quality tradeoffs, the number and source of the chiplets, and real-world workloads and projected lifespans. Marc Jacobs, senior director of solutions architectur... » read more

← Older posts