The Week In Review: Design

Tools Synopsys debuted new versions of its circuit simulation and custom design products. FineSim SPICE provides 2X faster simulation and Monte Carlo analysis speed, CustomSim FastSPICE offers 2X speed-up for post-layout SRAM simulation and maintains multi-core scalability by providing additional 2X speed-up on four cores, and HSPICE delivers 1.5X speed-up for large post-layout designs, accord... » read more

IIoT Security Threat Rising

The rapid growth of the Industrial Internet of Things is raising questions about just how secure these systems are today, how to improve security, and who exactly should be responsible for that. These issues are interlaced with a shift in where a growing volume of data gets processed, the cost and speed of moving large amounts of data, and the increasing frequency and cost of attacks. "Di... » read more

Blog Review: Mar. 14

Cadence's Meera Collier considers the issues of bias implementation in algorithms and AI systems, and whether immense training sets can really solve the problem. Mentor's Cristian Filip digs into the evolution of signal integrity analysis methods and why different data rates require different solutions. Synopsys' Naveen G explains key features introduced in the latest generation of interc... » read more

LiDAR Goes Back To The Future

LiDAR is emerging as an increasingly important piece of the enabling technology in autonomous driving, along with advanced computer vision and radar sensor chips. But LiDAR systems also are finding their way into a variety of other applications, including industrial automation, including robotics, and unmanned aerial vehicles. Advanced mapping is another rapidly growing market for LiDAR, whi... » read more

Power Aware Intent And Structural Verification Of Low-Power Designs

Power aware static verification, more popularly known as PA-Static checks, is performed on designs that adopt certain power dissipation reduction techniques through the power intent or [gettech id="31044" t_name="UPF"]. The term static originates from verification tools and methodologies that applies a set of pre-defined power aware (PA) or multi-voltage (MV) rules based on the power requiremen... » read more

IP And Power

[getkc id="108" kc_name="Power"] is quickly becoming a major differentiator for products, regardless of whether they are connected to a wall outlet or dependent on a battery. At the same time, increasing amounts of a chips content comes from third-party [getkc id="43" kc_name="IP"]. So how do system designers ensure that the complete system has an optimal power profile, and what can they do to ... » read more

Mentor TLC NAND Softmodel Soft-Bit Error Injection

Designing SSD controllers targeting NAND flash as the storage media requires some heavy lifting when it comes to dealing with the soft-errors that the flash will eventually produce. This paper will look at a method to simplify the design and verification required. We model these soft-bit behaviors with the Veloce emulator in a virtual setup, which reduces the time to market for an SSD. To r... » read more

Blog Review: Mar. 7

Synopsys' Amit Paunikar and Shaily Khare take a look at new features in LPDDR5, from improved data bandwidth and Deep Sleep Mode to WCK clock. Cadence's Paul McLellan dives into forward error correction, a technique for automatically correcting errors in transmitted network data, with a look at why it's important and how it works. In his latest embedded software video, Mentor's Colin Wall... » read more

Finding Faulty Auto Chips

The next wave of automotive chips for assisted and autonomous driving is fueling the development of new approaches in a critical field called outlier detection. KLA-Tencor, Optimal+, as well as Mentor, a Siemens Business, and others are entering or expanding their efforts in the outlier detection market or related fields. Used in various industries for several years, outlier detection is one... » read more

Bosch Visiontec Case Study

The BOSCH Visiontec team innovates assisted and autonomous driving technology. This team develops state-of-the-art IPs and ICs containing high-performance processors that implement algorithms to recognize images from cameras in automobiles. They were tasked to create several brand-new designs that implemented mathematically-intense algorithms in less than a year. The specifications of these des... » read more

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