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Chip Industry’s Technical Paper Roundup: Nov. 29


New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /]   Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

Wafer-Scale Variability In Photonic Devices & Effects On Circuits


A technical paper titled "Capturing the Effects of Spatial Process Variations in Silicon Photonic Circuits" was published by researchers at Photonics Research Group, Ghent University−IMEC. "We present in this paper a method to extract a granular map of the line width and thickness variation on a silicon photonics wafer. We propose a hierarchical model to separate the layout-dependent and l... » read more

Challenges In Backside Power Delivery


One of the key technologies to enable scaling below 3nm involves delivering of power on the backside of a chip. This novel approach enhances signal integrity and reduces routing congestion, but it also creates some new challenges for which today there are no simple solutions. Backside power delivery (BPD) eliminates the need to share interconnect resources between signal and power lines on t... » read more

Hot Trends In Semiconductor Thermal Management


Increasing thermal challenges, as the industry moves into 3D packaging and continues to scale digital logic, are pushing the limits of R&D. The basic physics of having too much heat trapped in too small a space is leading to tangible problems, like consumer products that are too hot to hold. Far worse, however, is the loss of power and reliability, as overheated DRAM has to continually r... » read more

Blog Review: Nov. 16


Siemens EDA's Jake Wiltgen explains the difference between transient and permanent faults when designing to the ISO 26262 standard, including where they come from and key ways to protect against them. Synopsys' Vikas Gautam points to how the economics of designing large SoCs is driving chiplet-based designs and the need for die-to-die standards such as UCIe, along with the key protocol verif... » read more

Metrology Of Thin Resist For High NA EUVL


One of the many constrains of high numerical aperture extreme ultraviolet lithography (High NA EUVL) is related to resist thickness. In fact, one of the consequences of moving from current 0.33NA to 0.55NA (high NA) is the depth of focus (DOF) reduction. In addition, as the resist feature lines shrink down to 8nm half pitch, it is essential to limit the aspect ratio to avoid pattern collapse. T... » read more

Balancing Power And Heat In Advanced Chip Designs


Power and heat use to be someone else's problem. That's no longer the case, and the issues are spreading as more designs migrate to more advanced process nodes and different types of advanced packaging. There are a number of reasons for this shift. To begin with, there are shrinking wire diameters, thinner dielectrics, and thinner substrates. The scaling of wires requires more energy to driv... » read more

Chip Industry’s Technical Paper Roundup: Nov. 1


New technical papers added to Semiconductor Engineering’s library this week. [table id=61 /] » read more

Full Wafer Integration of Aggressively Scaled 2D-Based Logic Circuits (Imec)


A technical paper titled "Challenges of Wafer-Scale Integration of 2D Semiconductors for High-Performance Transistor Circuits" was published by researchers at Imec. "The introduction of highly scaled 2D-based circuits for high-performance logic applications in production is projected to be implemented after the Si-sheet-based CFET devices. Here, a view on the requirements needed for full waf... » read more

Site-Specific Compositional Info from Periodic Nanostructures Obtained Using Rutherford Backscattering Spectrometry


A new technical paper titled "Quantification of area-selective deposition on nanometer-scale patterns using Rutherford backscattering spectrometry" was published by researchers at IMEC and KU Leuven. "We present a site-specific elemental analysis of nano-scale patterns whereby the data acquisition is based on Rutherford backscattering spectrometry (RBS). The analysis builds on probing a larg... » read more

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