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Will Big Competition Attract More Talent For IC Companies?


Google is hiring a chip packaging technologist. General Motors is seeking a wafer fabrication procurement specialist. Facebook Reality Labs wants a materials researcher with experience in photolithography and nanoimprint techniques. Recent job postings by tech and automotive giants are enough to worry any chip company executive struggling to attract talent. But what may seem at first like a ... » read more

Bridging IC Design, Manufacturing, And In-Field Reliability


Experts at the Table: Semiconductor Engineering sat down to talk about silicon lifecycle management and how that can potentially glue together design, manufacturing, and devices in the field, with Prashant Goteti, principal engineer at Intel; Rob Aitken, R&D fellow at Arm; Zoe Conroy, principal hardware engineer at Cisco; Subhasish Mitra, professor of electrical engineering and computer sci... » read more

The Challenge Of Optimizing Chip Architectures For Workloads


It isn't possible to optimize a workload running on a system just by looking at hardware or software separately. They need to be developed together and intricately intertwined, an engineering feat that also requires bridging two worlds with have a long history of operating independently. In the early days of computing, hardware and software were designed and built by completely separate team... » read more

Improving PPA With AI


AI/ML/DL is starting to show up in EDA tools for a variety of steps in the semiconductor design flow, many of them aimed at improving performance, reducing power, and speeding time to market by catching errors that humans might overlook. It's unlikely that complex SoCs, or heterogeneous integration in advanced packages, ever will be perfect at first silicon. Still, the number of common error... » read more

A Holistic Approach To Energy-Efficient System-On-Chip (SoC) Design


It takes a great deal of energy to power the modern world, and demand grows every day. This is especially true for electronics, where ever increasing automation and more intelligent devices incessantly demand more power. Many applications that use chips face a variety of pressures for reduced power consumption and better energy efficiency. In response, the semiconductor and electronic design au... » read more

CEO Outlook: Chip Industry 2022


Semiconductor Engineering sat down to discuss broad industry changes and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front of a live audience... » read more

Semiconductor Scaling Is Failing — What Next For Processors?


This in-depth paper looks at the changing dynamics in the semiconductor industry. In other words, why many companies are looking to customize their processor designs to keep pace with software and system demands. It goes onto highlight the opportunities available to companies of all sizes, in seeking to differentiate and specialize their processor designs. Click here to read more. » read more

Hardware-Supported Patching of Security Bugs in Hardware IP Blocks


New research paper from Duke University, University of Calgary, NYU & Intel. Abstract: "To satisfy various design requirements and application needs, designers integrate multiple Intellectual Property blocks (IPs) to produce a system-on-chip (SoC). For improved survivability, designers should be able to patch the SoC to mitigate potential security issues arising from hardware IPs; for incre... » read more

EDA On Cloud Presents Unique Challenges


Discussions about cloud-based EDA tools are heating up for both hardware and software engineering projects, opening the door to vast compute resources that can be scaled up and down as needed. Still, not everyone is on board with this shift, and even companies that use the cloud don't necessarily want to use it for every aspect of chip design. But the number of cloud-based EDA tools is growi... » read more

Autonomous Design Automation: How Far Are We?


The year is 2009, during the Design Automation Conference (DAC) at a press dinner in a posh little restaurant in San Francisco’s Civic Center. About two glasses of red wine in, one of the journalists challenges the table: “So, how far away are we from the black box that we feed with our design requirements and it produces the design that we send to the foundry?” We discussed all the indus... » read more

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