Author's Latest Posts


Blog Review: July 1


Cadence's Krunal Patel highlights auto-negotiation, a foundational feature in Ethernet that allows two connected devices to automatically determine the best possible operating parameters for a link, eliminating manual configuration and ensuring optimal performance. Synopsys' Sumit Vishwakarma warns of the rising cost of overdesign, particularly in advanced node and multi-die designs, and how... » read more

Research Bits: June 30


Monolithic 3D integration Researchers from the University of Illinois Urbana-Champaign developed a low-temperature process for monolithic 3D integration using standard single-crystalline silicon. “Generally, the industry accepts that once the first layer of circuits is complete, the thermal budget limit for any additional layers is 400 degrees Celsius,” said Qing Cao, a materials scienc... » read more

Blog Review: June 24


Cadence's Veena Parthan shows how finite element analysis simulations for crash testing can surpass the limitations of physical testing and offer insights into a wider array of crash scenarios that were once impossible to explore. Siemens' Haitham Eissa and Amr Khafagy warn that once-passive dummy fill structures have begun to influence design performance significantly as the industry progre... » read more

Research Bits: June 23


Redesigning high-NA EUV A researcher from the Okinawa Institute of Science and Technology (OIST) proposes redesigning the illumination systems and projectors used in high-NA EUV lithography to reduce optical effects and enhance resolution. In the proposed projector design, the collector mirrors in the illumination system have a simpler design to bring short wavelengths of light from the EUV... » read more

Blog Review: June 17


Cadence's Rajan Jani explains NVMe's Controller Memory Buffer feature, which exposes on-controller memory directly to the host system to reduce latency, improve PCIe fabric efficiency, and increase performance in multi-switch topologies. Siemens' Linus Tauro shares how to run an SSN datapath at double the I/O data rate by implementing a BusFrequencyMultiplier and BusFrequencyDivider pair. ... » read more

Research Bits: June 15


NAND in space Researchers from Georgia Institute of Technology and Pennsylvania State University built ferroelectric NAND flash memory chips that can withstand up to 30 times higher radiation levels compared to conventional NAND. “If you send traditional flash memory to space, the radiation interacting with flash memory’s trapped electric charge can easily corrupt the data,” said Asif... » read more

Research Bits: June 8


Multi-tasking transistor Researchers at Pohang University of Science & Technology (POSTECH) developed a zinc oxide (ZnO) and tellurium (Te) heterojunction transistor technology that exhibits negative differential transconductance (NDT), where current decreases over a certain voltage range. By precisely controlling overlap length between the two materials, the team realized double negati... » read more

Blog Review: Jun. 3


Siemens' Gordon Allan contends that verification IP gives design teams a practical way to verify standards-based interfaces and memories without rebuilding the same infrastructure generation after generation and shares key evaluation metrics. Synopsys' Sutirtha Kabir suggests that successful multi-die design will require deeper collaboration from early architecture exploration to manufacturi... » read more

Research Bits: Jun. 2


Integrated valleytronics device Researchers from Monash University designed a valleytronics circuit that can generate, direct, and read light-based information on a single chip. Potential applications include quantum computing, advanced imaging, and optical communication systems. “We employ a straightforward stacking approach to integrate ultrathin materials with metasurfaces, overcoming ... » read more

Blog Review: May 27


Cadence's Igor Krause explains Precision Time Measurement (PTM), a PCIe feature that enables precise coordination of events across multiple components with independent local time clocks. Siemens' John McMillan suggests the way to achieve trusted traceability across the semiconductor supply chain is by implementing a blockchain-based distributed ledger paired with a secure digital twin. Sy... » read more

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