tag: Google

Chip Industry Week In Review
By The SE Staff - 13 Dec, 2024 - Comments: 0

The 2024 IEEE International Electron Devices Meeting (IEDM) was held this week, prompting a number of announcements from: imec: Proposed a new CFET-based standard cell architecture for the A7 node containing two rows of CFETs with a shared signal routing wall in between, allowing standard cell heights to be reduced from 4 to 3.5T, compared to single-row CFETs. Integrated indium pho... » read more

FOPLP Gains Traction in Advanced Semiconductor Packaging
By Gregory Haley - 21 Nov, 2024 - Comments: 1

Fan-Out Panel-Level Packaging (FOPLP) for advanced nodes, once hindered by manufacturability and yield challenges, is emerging as a promising solution to meet the industry’s demands for higher integration densities and cost efficiency. Traditionally, FOPLP has been a go-to solution for cost-sensitive applications in consumer electronics, IoT devices, and mid-tier automotive systems. Its ab... » read more

Asia Government Funding Surges
By Liz Allan - 18 Nov, 2024 - Comments: 0

Billions of dollars have been pouring into Asian countries for the past few years in an effort to boost their production capacity, explore leading-edge technology, compete on the global stage, and shore up supply chains in the face of geopolitical turmoil. Each country has its own plan to maintain a foothold in the global market, from China’s Big Fund to Korea’s Yongin Cluster and Japan�... » read more

Mass Customization For AI Inference
By Ann Mutschler - 17 Oct, 2024 - Comments: 0

Rising complexity in AI models and an explosion in the number and variety of networks is leaving chipmakers torn between fixed-function acceleration and more programmable accelerators, and creating some novel approaches that include some of both. By all accounts, a general-purpose approach to AI processing is not meeting the grade. General-purpose processors are exactly that. They're not des... » read more

Chip Industry Week In Review
By The SE Staff - 04 Oct, 2024 - Comments: 0

Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Barriers To Chiplet Sockets
By Brian Bailey - 30 Sep, 2024 - Comments: 0

Experts At The Table: Demand for chiplets is growing, but debate continues about whether standards and general-purpose chiplets will kick-start the commercialization boom, or whether success will come through customization of those chiplets. Semiconductor Engineeering sat down to discuss these and other related issues with Elad Alon, CEO of Blue Cheetah; Mark Kuemerle, vice president of technol... » read more

Chip Industry Week In Review
By The SE Staff - 20 Sep, 2024 - Comments: 0

Synopsys agreed to sell its Optical Solutions Group to Keysight for an undisclosed amount, in a deal deemed necessary for Synopsys to win regulatory approval for its planned acquisition of Ansys. The sale to Keysight is contingent on the Synopsys-Ansys deal going through. Meanwhile, Ansys has its own optical business. The U.S. Department of Defense (DoD) made the first awards for Microelectr... » read more

What Comes After HBM For Chiplets
By Brian Bailey - 18 Sep, 2024 - Comments: 0

Experts At The Table: Semiconductor Engineering sat down to discuss what will trigger the creation of a commercial chiplet marketplace, and what those chiplet-based designs will look like, with Elad Alon, CEO of Blue Cheetah; Mark Kuemerle, vice president of technology at Marvell; Kevin Yee, senior director of IP and ecosystem marketing at Samsung; Sailesh Kumar, CEO of Baya Systems; and Tanuja... » read more

Chip Industry Technical Paper Roundup: Sept. 17
By Linda Christensen - 17 Sep, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=356 /] More ReadingTechnical Paper Library home » read more

Quantum Computing: Google’s Surface Code Technique to Reduce Errors
By Technical Paper Link - 11 Sep, 2024 - Comments: 0

A new technical paper titled "Quantum error correction below the surface code threshold" was published by researchers at Google and other collaborators. Abstract "Quantum error correction provides a path to reach practical quantum computing by combining multiple physical qubits into a logical qubit, where the logical error rate is suppressed exponentially as more qubits are added. However, ... » read more

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