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Weird Incidents Reveal L5 Challenges


A series of surprising, counterintuitive, and sometimes bizarre incidents reveal the challenges of achieving full Level 5 autonomy in self-driving vehicles, which are an increasingly common site in major cities. While it’s easy to dismiss such anecdotes as humorous glitches compared with the sobering accounts of autonomous tech-related injuries and fatalities, industry executives say these oc... » read more

Which Foundry Is In The Lead? It Depends.


The multi-billion-dollar race for foundry leadership is becoming more convoluted and complex, making it difficult to determine which company is in the lead at any time because there are so many factors that need to be weighed. This largely is a reflection of changes in the customer base at the leading edge and the push toward domain-specific designs. In the past, companies like Apple, Google... » read more

Bespoke Silicon Rattles Chip Design Ecosystem


Bespoke silicon developers are shaking up relationships, priorities, and methodologies across the semiconductor industry, creating demand for skills that cross traditional boundaries, and driving new business models that leverage these enormous investments. Bespoke silicon designers today are a rare breed, capable of understanding the unique requirements of a specific domain, as well as a gr... » read more

Why Silent Data Errors Are So Hard To Find


Cloud service providers have traced the source of silent data errors to defects in CPUs — as many as 1,000 parts per million — which produce faulty results only occasionally and under certain micro-architectural conditions. That makes them extremely hard to find. Silent data errors (SDEs) are random defects produced in manufacturing, not a design bug or software error. Those defects gene... » read more

IC Architectures Shift As OEMs Narrow Their Focus


Diminishing returns from process scaling, coupled with pervasive connectedness and an exponential increase in data, are driving broad changes in how chips are designed, what they're expected to do, and how quickly they're supposed to do it. In the past, tradeoffs between performance, power, and cost were defined mostly by large OEMs within the confines of an industry-wide scaling roadmap. Ch... » read more

Week In Review: Manufacturing, Test


Highlights from ITC The hot topic at this week’s International Test Conference (ITC) was tackling silent data corruption, with panel discussions, papers, and Google’s Parthasarathy Ranganathan’s keynote address all emphasizing the urgency of the issue. In the past two years Meta, Google, and Microsoft have reported on silent errors, errors not detected at test, which are adversely impact... » read more

Toward Domain-Specific EDA


More companies appear to be creating custom EDA tools, but it is not clear if this trend is accelerating and what it means for the mainstream EDA industry. Whenever there is change, there is opportunity. Change can come from new abstractions, new options for optimization, or new limitations that are imposed on a tool or flow. For example, the slowing of Moore's Law means that sufficient prog... » read more

Progress In Quantum Computing


A recent wave of quantum computing investment has given rise to claims of a quantum computing bubble, based on overly optimistic technological claims in a field area that experts say has yet to demonstrate any real utility. But executives on the industry’s front lines say quantum computing is indeed a commercially viable technology, albeit one that is at least several years away from overcomi... » read more

Week In Review: Manufacturing, Test


President Biden signed an executive order on Sept. 15, limiting foreign investments in U.S. technology by "competitor or adversarial nations" that are deemed a threat to national security. In the past, the Committee on Foreign Investment in the United States (CFIUS) largely limited its actions to the sale of U.S. companies. The new directive expands that to include investments involving "U.S. s... » read more

Week In Review: Design, Low Power


Cadence unveiled a big data analytics infrastructure to unify massive data sets across all Cadence computational software. The Joint Enterprise Data and AI (JedAI) Platform aims to optimize multiple runs of multiple engines across an entire SoC design and verification flow. It combines data from its AI-driven Cerebrus implementation and Optimality system optimization solutions, along with the n... » read more

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