Designing Ultra Low Power AI Processors


AI chip design is beginning to shift direction as more computing moves to the edge, adding a level of sophistication and functionality that typically was relegated to the cloud, but in a power envelope compatible with a battery. These changes leverage many existing tools, techniques and best practices for chip design. But they also are beginning to incorporate a variety of new approaches tha... » read more

Week In Review: Auto, Security, Pervasive Computing


Synopsys has added nanoscale and macroscale illumination optics to its RSoft Photonic Device Tools version 2020.03. ARVR designers can use the RSoft-LightTools Bidirectional Scattering Distribution Function (BSDF) interface to make interpolated BSDF files for optimized nanoscale and macroscale optics, such as freeform optical prism projectors, eye tracking technologies, and optical planar waveg... » read more

Lane Departure Warnings For The Auto Industry


The automotive chip market is undergoing a series of subtle but significant shifts behind the scenes that could have major implications for the global automotive supply chain. After a few years of racing toward autonomous vehicles and setting in motion a frenzy of activity, some of the big auto makers have begun taking the design of key functions such as centralized logic in-house. There... » read more

Tracking Automotive’s Rapidly Shifting Ecosystem


The automotive ecosystem is becoming much harder to navigate as automakers, Tier 1s and IP vendors redefine their relationships based upon shifting value caused by an rapidly expanding amount of increasingly interdependent and complex electronic content. Predictions of massive change started almost a decade ago with a number of pilot programs around autonomous vehicles. But those shifts real... » read more

What Machine Learning Can Do In Fabs


Semiconductor Engineering sat down to discuss the issues and challenges with machine learning in semiconductor manufacturing with Kurt Ronse, director of the advanced lithography program at Imec; Yudong Hao, senior director of marketing at Onto Innovation; Romain Roux, data scientist at Mycronic; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. L-R:... » read more

Week In Review: Manufacturing, Test


The coronavirus (COVID-19) continues to have an impact on most, if not all, industries. This includes the electronics, semiconductor and related segments. International Data Corp. (IDC) has released a report on the company’s view on the impact the COVID-19 virus will have on the semiconductor market. The report provides a framework to evaluate the market impact through four scenarios. "... » read more

New Architectural Issues Facing Auto Ecosystem


As chips bound for the automotive world move to small process nodes, including 5nm and below, the automotive ecosystem is wrestling with both scaling issues and challenges related to architecting safety-critical systems using fewer chips. This may sound counterintuitive, because one of the main reasons automotive chip providers are moving to smaller nodes is to reduce the number of chips in ... » read more

An Increasingly Complicated Relationship With Memory


The relationship between a processor and its memory used to be quite simple, but in modern SoCs there are multiple heterogeneous processors and accelerators, each needing a different means of accessing memory for maximum efficiency. Compromises are being made in order to preserve the unified programming model of the past, but the pressures are increasing for some fundamental changes. It does... » read more

Chiplet Momentum Rising


The chiplet model is gaining momentum as an alternative to developing monolithic ASIC designs, which are becoming more complex and expensive at each node. Several companies and industry groups are rallying around the chiplet model, including AMD, Intel and TSMC. In addition, there is a new U.S. Department of Defense (DoD) initiative. The goal is to speed up time to market and reduce the cost... » read more

Where Timing And Voltage Intersect


João Geada, chief technologist at ANSYS, talks about the limitations for power delivery networks and what processors can handle, why the current solutions to these issues are causing failures, and how voltage reduction can affect timing. » read more

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