Author's Latest Posts

An Ideal Architecture For Always-On Camera Subsystems

Always-sensing camera implementations offer a wealth of user experience advantages but face significant power, latency, and privacy concerns if not done right. To be successful, always-sensing camera subsystems must be architected to preserve battery life and to ensure privacy and security while delivering key user experience improvements. In a joint white paper with Rambus, Expedera discuss... » read more

The Road Ahead For SoCs In Self-Driving Vehicles

Automakers have relied on a human driver behind the wheel for more than a century. With Level 3 systems in place, the road ahead leads to full autonomy and Level 5 self-driving. However, it’s going to be a long climb. Much of the technology that got the industry to Level 3 will not scale in all the needed dimensions — performance, memory usage, interconnect, chip area, and power consumption... » read more

Heterogeneous Integration — Chiplets

Chiplets are a hot topic in the semiconductor industry, and to many, represent a paradigm change for chip designers and chip consumers alike. While heterogenous chiplets seem to have multiple advantages over traditional monolithic silicon and even homogenous chiplets, they still have not been mass-market deployed. This white paper, published in cooperation with the Global Semiconductor Alliance... » read more

Architectural Considerations For Compute-In-Memory In AI Inference

Can Compute-in-Memory (CIM) bring new benefits to AI (Artificial Intelligence) inference? CIM is not an AI solution; rather, it is a memory management solution. CIM could bring advantages to AI processing by speeding up the multiplication operation at the heart of AI model execution. To read more, click here. » read more