Author's Latest Posts


Analyzing Testbench Design Performance Using Verdi Performance Analyzer


Performance continues to be key factor for the design of any complex system-on-chip (SoC). Moreover, complexity is increasing every day, which poses a challenge for engineers to track performance of the design, yet they are tasked to continuously increase chip performance. This paper describes the challenge to measure design performance and explains how Verdi Performance Analyzer enables run ti... » read more

Configure, Confirm, Ship: Build Secure Processor-Based Systems with Faster Time-to-Market


Security is a first-order design requirement for processor-based systems. Processor designers implement security functionality directly into the hardware itself to protect the system at its most fundamental layer. System integrators that use processor IP such as Synopsys’ DesignWare ARC processors must ensure that they configure and manage the protection and security features correctly, and t... » read more

Best Practices for Traceability of Functional Safety Requirements In Automotive IP & SoCs


Automotive functional safety systems continue to incorporate complex features to meet wide range of consumer demands. Developing functional safety systems, including all the components such as the system-on-chip (SoC) and IP, hinges on the ability to meet the stringent automotive functional safety requirements such as definition, implementation, verification, and validation. Functional safety S... » read more

Synopsys FPGA Platform: Enabling Faster Design, Verification and Debug of FPGAs


Field programmable gate arrays (FPGAs) are no longer the co-processor of full-custom chips and application-specific integrated circuits (ASICs). Today's FPGA offerings include devices as large and complex as any ASIC system-on-chip (SoC) on the market. The dramatic increase in size, complexity and functionality means that many FPGA development teams are adopting ASIC-style design, verification ... » read more

Enabling Faster Design, Verification and Debug of FPGAs


Field programmable gate arrays (FPGAs) are no longer the co-processor of full-custom chips and application-specific integrated circuits (ASICs). Today’s FPGA offerings include devices as large and complex as any ASIC system-on-chip (SoC) on the market. The dramatic increase in size, complexity and functionality means that many FPGA development teams are adopting ASIC-style design, verificatio... » read more

Configure, Confirm, Ship


Security is a first-order design requirement for processor-based systems. Processor designers implement security functionality directly into the hardware itself to protect the system at its most fundamental layer. System integrators that use processor IP such as Synopsys’ DesignWare® ARC® processors must ensure that they configure and manage the protection and security features correctly, a... » read more

Four Steps For Static Verification Of Low Power Designs Using UPF With VC LP


Low power consumption has always been a key requirement for portable electrical and electronic devices. In recent years, this requirement has been extended to many more categories of end products. The electronics industry has developed a wide range of techniques for power management and has defined the Unified Power Format (UPF) to describe design intent for some of the most common methods. Suc... » read more

Say Welcome to the Machine: Low-Power Machine Learning for Smart IoT Applications


By Pieter van der Wolf, Principal R&D Engineer, Synopsys Inc. and Dmitry Zakharov, Senior Software Engineer, Synopsys Inc Smart IoT devices that interact intelligently with their users are appearing in many application areas. Increasingly, these devices apply machine learning technology for processing captured sensor data, so that smart actions can be taken based on recognized patterns. ... » read more

The Power Of Integrating Bluetooth Low Energy Into SoCs


The Bluetooth Low Energy (BLE) specification, released in 2011, enables designers of System-on-Chips (SoCs) to maximize the battery life of IoT devices and minimize the implementation costs of wireless sensors and other “connected things” by maximizing sleep time and simplifying Radio operation. Because it is built on the established ecosystem of Bluetooth Classic for mobile phones and P... » read more

How To Navigate The Open Source Risk Landscape


Open source use isn’t risky, but unmanaged use of open source is. Open source software forms the backbone of nearly every application in every industry. Chances are that includes the applications your company develops as well. If you can’t produce an accurate inventory of the licenses, versions, and patch status of the open source components in your applications, it’s time to assess yo... » read more

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