Author's Latest Posts


Managing Web Application Security With Coverity


While security practitioners can and should play an active role in web application security, only developers are familiar enough with the code to fix software vulnerabilities. For this reason, security teams can most effectively prevent software vulnerabilities from entering production by equipping their development teams with the tools to fix security issues as they’re building applications.... » read more

Eliminate Silicon Respins With Netlist CDC Verification


Clock domain crossing (CDC) verification has been an integral part of modern chip design flow for quite sometime. Traditionally CDC verification has been done during the RTL stage. However, for advanced designs and complex flows, there is significant logic optimization during RTL synthesis as well as backend flows at the netlist stage. This mandates clock domain crossing verification a must for... » read more

Neuromorphic Computing Drives The Landscape Of Emerging Memories For Artificial Intelligence SoCs


The pace of deep machine learning and artificial intelligence (AI) is changing the world of computing at all levels of hardware architecture, software, chip manufacturing, and system packaging. Two major developments have opened the doors to implementing new techniques in machine learning. First, vast amounts of data, i.e., “Big Data,” are available for systems to process. Second, advanced ... » read more

RTL Architect: Simply Better RTL


Electronic devices play a key role in society. They connect us to one another through voice, video and chat. They entertain, educate, protect and heal us in new and ever-expanding ways. They have changed the way we work, live and play. Silicon chips are the fast beating heart (2 to 3 billion beats per second) of these devices. For decades, the relentless advancements in semiconductor process te... » read more

DDR5: The Next-Generation Technology For High Performance Computing


The rapid growth in real-time data requirements for cloud services, IoT, high-performance servers and workstations, hyperscale data centers and big data has increased pressure on memory suppliers to improve memory density and speed. This pressure has resulted in a need for new memory technology that goes beyond the current DDR4 limit of 16 Gb single die capacity and speed of 3200MT/s. Click ... » read more

A New Co-Simulation Approach for Tolerance Analysis on Vehicle Propulsion Subsystem


An increasing demand for reducing cost and time effort of the design process via improved CAE (ComputerAided Engineer) tools and methods has characterized the automotive industry over the past two decades. One of the main challenges involves the effective simulation of a vehicle’s propulsion system dealing with different physical domains: several examples have been proposed in the literature ... » read more

Fusion Technology


Learn how the recent semiconductor industry shifts are breaking the traditional RTL-to-GDSII flow, and how the new Synopsys Fusion Technology helps you cross the chasm. To read more, click here. » read more

Exhaustive Verification of Reset Domain Crossings


It is difficult to imagine an aspect of semiconductor development more fundamental than reset. The ability to initialize the entire hardware design and clean all software running through a system-on-chip (SoC) is essential. Stating with a known state avoids propagation of signals with unknown values. Despite the best efforts at verification, lingering corner case bugs may put a system into a st... » read more

Building Security IntoThe DevOps Life Cycle


The primary goal when breaking the build in the CI/CD DevOps life cycle is to treat security issues with the same level of importance as quality and business requirements. If quality or security tests fail, the continuous integration server breaks the build. When the build breaks, the CI/CD pipeline also breaks. Based on the reason for the broken build, appropriate activities such as archite... » read more

Constraint-Based Verification Of Clock Domain Crossings


There are many measures of the ever-growing size and complexity of semiconductor devices: die area, transistor count, gate count, size of memories, amount of parallel processing and more. All these factors mean more time spent in design, but they also have a major impact on verification. Since virtually all industry studies show verification time and effort growing faster than design, this impa... » read more

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