Si Hardmask (Si-HM), EUV And Zero Defects


The multilayer system used in lithography consists of a planarizing carbon layer beneath a hardmask etch-transferring layer and capped with a standard photoresist coating. In the past, Brewer Science has discussed in-depth how the multilayer system helped to extend ArF (193 nm) immersion lithography to be able to print and transfer ever-shrinking features, ensuring enough process window especia... » read more

Advanced Materials For High-Temperature Process Integration


From the last several lithography nodes, in the 14 to 10nm range, to the latest nodes, in the 7 to 5nm range, the requirements for patterning and image transfer materials have increased dramatically. One of the key pinch points is the tradeoff between planarization and the high-temperature stability required from carbon films used in patterning and post-patterning process integration. Patter... » read more

Printed Sensor Market Expands


The growing use of actionable information in new ways to make better decisions is driving brisk growth in printed electronics (PE) and sensors. According to BCC Research, the global market for sensors should grow from $173.4 billion in 2019 to reach $323.3 billion by 2024 – a compound annual growth rate (CAGR) of 13.3%. Where will this growth come from? Where are the immediate, and longer-... » read more

Material Solutions For FOWLP Die Shift And Wafer Warpage


By Shelly Fowler Today's fan-out wafer-level packaging (FOWLP) processes use organic substrates composed of epoxy mold compound (EMC) created using a thermal compression process. EMC wafers are a cost-effective way to achieve lower-profile packages without using an inorganic substrate to produce chip packages that are thinner and faster without the need for interposers or through-silicon-via... » read more

Multifunctional Materials Enable Single-Layer Temporary Bonding And Debonding


Many new wafer-level packaging (WLP) technologies involve the processing of thin wafers that must be mechanically supported during the manufacturing flow. These technologies include fan-out wafer-level packaging (FOWLP), fan-in wafer-level chip-scale packaging (FI-WLCSP), 3-D FOWLP, 2.5-D integration with interposer technology, and true 3-D IC integration using through-silicon via (TSV) interco... » read more

New Plastics Can Speed Flexible Printed Electronics Development


Substrates play a huge role when designing any type of device, including printed and flexible electronics. From its compatibility with your printing process or with the inks and materials you’re using, to its thermal properties, the choice of substrate can have a significant impact on the effectiveness and manufacturability of your product. However, substrate material capabilities tend to ... » read more

What AI Is… And Isn’t


AI is very good at some things. It may never be good at others. The challenge is figuring out where it can help the most, and then making the cost calculation for how it can be applied. Cost sounds like it should be fairly straightforward, but it isn't. For instance, what is the cost of continuing to doing something the same way if you aren't making necessary changes? Delaying those changes ... » read more

Solving Fan-Out Wafer-Level Warpage Challenges Using Material Science


Now more than ever we’re finding that semiconductor process engineers are turning to material scientists to help find solutions for their most complex challenges. Currently, they are looking for ways to improve fan-out wafer-level packaging (FOWLP), one of today’s hottest technologies for heterogeneous integration. Often, with these new advanced solutions come challenges that can impact ... » read more

The Next Generation Of Fingerprinting Technology


We used to think of fingerprinting as simply placing your finger on an ink pad and then rolling it on paper to obtain an identifiable mark that would distinguish you from everyone else on the planet. In today’s world, fingerprinting has evolved to take on another, broader definition. According to dictionary.com, fingerprinting can also mean “any unique or distinctive pattern that presents u... » read more

Prepare For Success With A Failure Mode And Effects Analysis And Control Plan


In order to proactively handle potential process or product errors before they occur in manufacturing or on a customer’s production line, many organizations implement a Failure Mode and Effects Analysis (FMEA) and Control Plan (CP). Used as a process tool by the US military as early as 1949, FMEAs and CPs have evolved and gained popularity in many industries ranging from automotive, to pharma... » read more

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