Confidential computing for eRISC-V; SEM automatic defect inspection; energy-aware DL on resource-constrained HW; transforming 2DICs into 3DICs using shuttle chips from multi-project wafers; clock-to-clock modulation covert channel; coverage path planning for TIMs; doping mechanism of nitric oxide in high-performance P-type WSe2 transistors.
New technical papers recently added to Semiconductor Engineering’s library:
| Name of Paper | Research Organizations |
|---|---|
| ACE: Confidential Computing for Embedded RISC-V Systems | IBM and Max Planck |
| Scanning electron microscopy-based automatic defect inspection for semiconductor manufacturing: a systematic review | KU Leuven and imec |
| Energy-Aware Deep Learning on Resource-Constrained Hardware | Imperial College London and University of Cambridge |
| Die-Level Transformation of 2D Shuttle Chips into 3D-IC for Advanced Rapid Prototyping using Meta Bonding | Tohoku University |
| Clock-to-Clock Modulation Covert Channel | University of Rennes-INSA Rennes-IETR-UMR and University of South Brittany/Lab-STICC- UMR CNRS |
| TIMtrace: Coverage Path Planning for Thermal Interface Materials | Karlsruhe Institute of Technology (KIT) and Robert Bosch GmbH |
| Uncovering the doping mechanism of nitric oxide in high-performance P-type WSe2 transistors | Purdue University, MIT and National Yang Ming Chiao Tung University |
Find more semiconductor research papers here.
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