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Power/Performance Bits: March 16


Adaptable neural nets Neural networks go through two phases: training, when weights are set based on a dataset, and inference, when new information is assessed based on those weights. But researchers at MIT, Institute of Science and Technology Austria, and Vienna University of Technology propose a new type of neural network that can learn during inference and adjust its underlying equations to... » read more

Power/Performance Bits: Feb. 23


Photonic AI accelerator There are now many processors and accelerators focused on speeding up neural network performance, but researchers at the University of Münster, University of Oxford, Swiss Federal Institute of Technology Lausanne (EPFL), IBM Research Europe, and University of Exeter say AI processing could happen even faster with the use of photonic tensor processors that can handle mu... » read more

Manufacturing Bits: June 23


Fan-out gas sensors At the recent IEEE Electronic Components and Technology Conference (ECTC), the University of California at Los Angeles (UCLA) and the Indian Institute of Science presented a paper on the development of a wearable MEMS gas sensor device based on a flexible wafer-level fan-out packaging technology. Researchers have demonstrated a gas sensor device or a personal environment... » read more

The Next Technology Frontier In MEMS Gyroscopes


In MEMS technology development, it is always exciting to see the next technology frontier, the border of the known and the unknown. Talent and hard work (along with ingenuity) can move this frontier and enrich all of us. We respect the efforts of MEMS innovators, who have developed original and creative ideas by building upon past knowledge and wisdom and have integrated this knowledge across m... » read more

Building An MRAM Array


MRAM is gaining traction in a variety of designs as a middle-level type of memory, but there are reasons why it took so long to bring this memory to market. A typical magnetoresistive RAM architecture is based on CoFeB magnetic layers, with an MgO tunneling barrier. The reference layer should have zero net magnetization to make sure that it doesn’t influence the orientation of the free lay... » read more

Power/Performance Bits: Oct. 15


Probabilistic computing Researchers at Purdue University and Tohoku University built a hardware demonstration of a probabilistic computer utilizing p-bits to perform quantum computer-like calculations. The team says probabilistic computing could bridge the gap between classical and quantum computing and more efficiently solve problems in areas such as drug research, encryption and cybersecurit... » read more

Power/Performance Bits: Jan. 22


Efficient neural net training Researchers from the University of California San Diego and Adesto Technologies teamed up to improve neural network training efficiency with new hardware and algorithms that allow computation to be performed in memory. The team used an energy-efficient spiking neural network for implementing unsupervised learning in hardware. Spiking neural networks more closel... » read more

Power/Performance Bits: Feb. 6


Recycling cathodes Nanoengineers at the University of California San Diego developed an energy-efficient recycling process that restores used cathodes from spent lithium ion batteries. The process involves harvesting the degraded cathode particles from a used battery and then boiling and heat treating them. In new batteries built with the cathodes, charge storage capacity, charging time and ba... » read more

Power/Performance Bits: March 14


Magnetic storage on one atom Scientists at IBM Research created a single-atom magnet and were able to store one bit of data on it, making it the world's smallest magnetic storage device. Using electrical current, the researchers showed that two magnetic atoms could be written and read independently even when they were separated by just one nanometer. This tight spacing could, the team hop... » read more

Managing Parasitics For Transistor Performance


The basic equations describing transistor behavior rely on parameters like channel doping, the capacitance of the gate oxide, and the resistance between the source and drain and the channel. And for most of the IC industry's history, these have been sufficient. “Parasitic” or “external” resistances and capacitances from structures outside the transistor have been small enough to discoun... » read more

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