Chip Industry’s Technical Paper Roundup: Dec 5


New technical papers recently added to Semiconductor Engineering’s library: [table id=171 /] More ReadingTechnical Paper Library home » read more

GAA NSFETs: ML for Device and Circuit Modeling


A new technical paper titled "A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors" was published by researchers at National Yang Ming Chiao Tung University. Abstract (excerpt) "Machine learning (ML) is poised to play an important part in advancing the predicting capability in semiconductor device compact modeling domai... » read more

Chip Industry’s Technical Paper Roundup: Mar. 14


New technical papers recently added to Semiconductor Engineering’s library: [table id=86 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Reducing Contact Resistance in Developing Transistors Based On 2D Materials


A new technical paper titled "WS2 Transistors with Sulfur Atoms Being Replaced at the Interface: First-Principles Quantum-Transport Study" was published by researchers at National Yang Ming Chiao Tung University. Abstract "Reducing the contact resistance is one of the major challenges in developing transistors based on two-dimensional materials. In this study, we perform first-principles ... » read more

Chip Industry’s Technical Paper Roundup: Feb. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=83 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Chiplet Placer with Thermal Consideration for 2.5D ICs


A new technical paper titled "Chiplet Placement for 2.5D IC with Sequence Pair Based Tree and Thermal Consideration" was published by researchers at National Yang Ming Chiao Tung University (Taiwan). Abstract "This work develops an efficient chiplet placer with thermal consideration for 2.5D ICs. Combining the sequence-pair based tree, branch-and-bound method, and advanced placement/pruning... » read more

Chip Industry’s Technical Paper Roundup: Feb. 14


New technical papers recently added to Semiconductor Engineering’s library: [table id=80 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Advanced Packaging for High-Bandwidth Memory: Influences of TSV size, TSV Aspect Ratio And Annealing Temperature


A technical paper titled "Stress Issue of Vertical Connections in 3D Integration for High-Bandwidth Memory Applications" was published by researchers at National Yang Ming Chiao Tung University. Abstract: "The stress of TSV with different dimensions under annealing condition has been investigated. Since the application of TSV and bonding technology has demonstrated a promising approach for ... » read more

Technical Paper Roundup: Sept. 12


New technical papers added to Semiconductor Engineering’s library this week. [table id=51 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

Scaling Down To 2nm: Using Microwaves For Efficient & Stable Doping


A new technical paper titled "Efficient and stable activation by microwave annealing of nanosheet silicon doped with phosphorus above its solubility limit" was just published by researchers at National Taiwan University, Cornell University, TSMC, University of Valladolid, DSG Technologies, National Central University and National Yang Ming Chiao Tung University. A modified microwave was used... » read more

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