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All AI Data Center Interconnects Will Be Optical Within 5 Years

InP and SiPho join CMOS as critical technologies. Lasers, CPO and OCS will be everywhere (indium phosphide, silicon photonics, co-packaged optics, optical circuit switch).

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I spent several days at OFC (Optical Fiber Communications Conference) 2026 in LA. The crowds were huge and the enthusiasm intense. Long-time attendees noted the shift from telecom to data center AI in just a few years.

Nvidia GTC 2026 took place simultaneously in San Jose. OFC and GTC are entangled because data center AI needs optical interconnect to keep compute fed.

Optical interconnect enabled the internet with transoceanic and transcontinental high-bandwidth optical fiber connections. Optical interconnect has since taken over scale-out links in the data center. All the overhead racks with bright yellow cables are fiber optics.

We are on the verge of several more transitions that will result in all high-bandwidth data interconnects becoming optical everywhere in the data center in the next five years:

  • Co-packaged Optics (CPO) will replace pluggable transceivers for scale out;
  • CPO will enable all links within the rack to move from copper to optical for scale up;
  • Optical Circuit Switches (OCS) will supplement and perhaps reduce silicon switches for scale across, scale out and scale up interconnects increasing reliability and performance at lower power
  • Lasers are the heartbeat of all optical interconnects (more on this next month)

Data center AI demand continues to ramp exponentially

Inference is driving AI now. ChatGPT started the revolution. AI is evolving, becoming more useful and exponentially more compute intensive. Anthropic and OpenAI are both at $25 billion-ish annual revenue run rates, up from zero in a few years. Most are still low on the AI learning curve so growth will accelerate as they come up that curve.


Fig. 1: Inference is evolving to require exponentially more compute. (Source: GTC 2026)


Fig. 2: Inference, from hyperscalers, is doubling AI demand in 1 year (Source: GTC 2026)

At GTC 2026 in March, Nvidia CEO Jensen Huang disclosed that inference demand is growing exponentially. Last year he had a solid backlog for $500M of AI Compute. Now, Nvidia has a solid backlog for $1 trillion of AI Compute. Meanwhile, Anthropic and OpenAI are reaching $25 billion in annual revenue run rate. And the hyperscalers, which are 60% of Nvidia’s demand, are boosting CapEx. (Hyperscalers are doing their own chips, as well.)


Fig. 3: New Rubin & LPX AI compute improve AI throughput & responsiveness. (GTC 2026)

As AI has moved from ChatGPT (one shot AI) to deep reasoning to agentic AI, the number of tokens processed per query has grown by several orders of magnitude. Because users are impatient humans, the speed of the response is critical too.

The pareto curve shown in Fig. 3 above has two axes:

  • The Y axis shows throughput in tokens per second per megawatt (MW).
  • The X axis shows interactivity in tokens per second (TPS) per user.

If AI demand was primarily batch, the priority would be maximum throughput at low TPS/user. But users running agentic workloads want a quick response, so high TPS/user is what matters.

The new Rubin provides significant improvement for all scenarios. For the highest TPS/user requirements, the integration of Groq LPX with Rubin gives an order of magnitude boost. Hyperscalers are limited by power, so getting 2X to 35X more throughput for the same MWs is huge, and it’s why their CapEx keeps ramping to most efficiently satisfy AI demand.


Fig. 4: Nvidia Feynman in 2028 brings 1,000+ GPU pods and Scale-up CPO. (GTC 2026)

At GTC 2025, Nvidia announced its scale-up switch with CPO. At GTC 2026, Huang announced CPO will come in 2028 with Feynman NVLink 8 CPO switches for scale up, although he said there will also be copper in scale up. Maybe there will be a customer option, or copper will be in-rack and optical between racks for larger pods. As CPO is increasingly used, concerns about reliability and manufacturability will be addressed, and as bandwidth keeps going up, CPO will take over all scale-up connections over the next few years. Huang also said regarding CPO, “We need capacity.” (Nvidia CPO is built on TSMC’s new process).

At OFC 2026, Nvidia VP Alexis Bjornlin disclosed a GB Blackwell NVL576 prototype where you can see connections remain copper in-rack but shift to optical (the yellow fiber optic cables) between racks. Perhaps this is the architecture for large Rubin and Feynman pods. Morgan Stanley recently opined Nvidia “is likely launching a CPO version of Rubin Ultra NVL144”.


Fig. 5: Prototype GB200 NVL576 system – optical fibers between racks (Nvidia, OFC 2026)

Nvidia’s Bjornlin showed how TSMC COUPE (Compact Universal Photonic Engine) is used for the CPO in Nvidia’s scale-out photonics switch, along with a front-panel pluggable laser.


Fig. 6: TSMC COUPE, CPO and pluggable lasers in Nvidia scale out switch (Nvidia OFC)

How Optics has transitioned from long-haul to rack-scale
Coherent is one of the major long-term players in the optics market. Julie Sheridan Eng is their CTO. Her keynote speech at OFC provided an overview of the progress in optics over time.


Fig. 7: Optics has improved about 2 orders of magnitude in two decades. (Coherent OFC)

As bandwidth and reliability has gone up while size, power and cost have declined, optics has transitioned from long distance communications to rack-scale communications.


Fig. 8: Optics has moved steadily from long-haul to rack-scale interconnect. (Coherent OFC)

Sheridan Eng explained how pluggable transceivers have been the workhorse in the data center for scale out for two decades, with steadily increasing data rates (the overhead yellow cables are fibers).


Fig. 9: Pluggable optical transceivers have been the workhorse for scale out. (Coherent OFC)

CPO has developed based on improvements in technology combined with the need for higher bandwidth, lower power, lower cost, and smaller size to enable optics to the GPU.


Fig. 10: CPO re-partitions to enable optics to the GPU. (Coherent OFC)

The two biggest players so far with products using CPO are Nvidia and Broadcom. Both have publicly stated they are using TSMC COUPE, which is a silicon photonics CPO solution.

Sheridan Eng explained that there are other CPO implementation options available that may have benefits for other applications: GaAs VCSEL, and MicroLED.


Fig. 11: There are multiple implementations for CPO for different use cases. (Coherent OFC)

CPO will replace pluggables in scale-out and copper in scale-up
At OFC 2026, Meta shared updated, extensive reliability data on scale-out switches comparing pluggable and CPO. They conclude that CPO, at least the one they evaluated, is more reliable than pluggable optical transceivers. CPO is a simpler, less mechanical, semiconductor product than a pluggable transceiver. CPO also reduces size and power, which are powerful benefits.

Once CPO reliability is demonstrated, it will spread and replace all pluggable transceivers in the next few years in scale-out. In scale-up networks, copper has growing reliability issues with higher frequencies. It will shift to CPO as reliability is shown to be better than copper.

Nvidia at GTC showed CPO is being introduced for scale-up interconnect in 2027/28, perhaps in parallel with copper or perhaps initially for cross-rack connections. As CPO reliability data builds, the shift to CPO will accelerate to rack scale-up, as well. As Nvidia says in an OFC 2026 paper, “Most of the system’s bandwidth is concentrated at the scale-up layer”.

There are many players introducing CPO. Broadcom and Nvidia have already deployed CPO into initial production for scale-out switches and plan to use it for scale-up. Other players include Ayar Labs, Intel Photonics, Marvell (acquired Celestial), and Lightmatter.

Ayar Labs, with Taiwan’s Wiwynn, showed an all-CPO scale-up rack system at OFC in March.


Fig. 12: A prototype scale up rack with 100% CPO interconnect. (Ayar & Wiwynn OFC)

As the close-up of a compute tray shows (in Fig. 13, below), copper will no longer be used for interconnect, but for cooling. All of the high-bandwidth interconnects will become yellow single-mode fiber-optic cables. The compute processor is in the middle. The two AI accelerators with multiple optical engines are at the back.

Plugged in the front of the tray are pluggable lasers that provide the medium to data transport. They are pluggable for fast replacement in the event of failure, and overprovisioned with a backup for continuous operation while a failure is being repaired.

The switch trays are in the top slots of the rack (shown above).


Fig. 13: A prototype all-CPO compute tray. (Ayar & Wiwynn OFC)

Nvidia at OFC described more how its CPO works. It is based on TSMC COUPE.


Fig. 14: Nvidia CPO works using TSMC COUPE. (Nvidia OFC)

A photonics chip (PIC) is fabricated on the 65nm SOI SiPh process. The optical signals flow through this. An EIC is fabricated on a 7nm FF CMOS process. This is bonded to the PIC and provides an electro-optical interface. It controls the SiPho heaters for the ring oscillators and reads the photodetectors. The EIC is smaller than the PIC, so there is room for the optical path to come from the top of the optical engine 3-D stack to the grating couplers on the PIC. Copper pillars are added with through vias to the bottom of the PIC: these connect to the substrate of the AI accelerator or switch.


Fig. 15: Optical and electrical performance on Nvidia CPO on TSMC COUPE. (Nvidia OFC)

TSMC COUPE brings in light from the top (at a slight angle as shown), through a lens, then through a grating coupler on the PIC. There is a metallic backside reflector to reduce signal loss. Nvidia’s data shows that in its transmission band, ~1300 to 1320 nm, there is just 1 dB of loss. This is for a 1D grating coupler, which is used to bring in the single polarization laser light. If data is brought in using 2D grating couplers, which handle unknown polarization light (polarization rotates arbitrarily in a single mode fiber cable), the loss will be greater for 2D grating couplers. The electrical performance of the COUPE 3D stack is excellent.


Fig. 16: Nvidia PIC implementation for its CPO. (Nvidia OFC)

The PIC+EIC occupy about 65mm2. The FAU (fiber array unit), or fiber connector, occupies about 40% of the PIC. The fiber bundle breaks out to an MPO-16 connector for transmit/receive data fibers, and a MPO-12 connector for laser fibers.


Fig. 17: Nvidia CPO Optical Engine on GPU/Switch Interposer. (Nvidia OFC)

Nvidia showed its CPO Optical Engine (OE) on the interposer. For initial production, the OE is on the organic substrate, or even in an NPO (near-packaged optics) configuration outside the package with a short copper connection between them. Closer to the interposer means lower power, higher performance, but loss of the full interposer if there is a reliability problem. NPO reduces the “blast radius” for reliability problems, but power and performance aren’t as good.

There were numerous presentations at OFC by Nvidia, Intel, Lightmatter and others on DWDM (Dense Wavelength Division Multiplexing) as the next step. Ayar Labs presented this at the last OFC. The OCI (Open Compute Interconnect) MSA contemplates this, as well. Everyone will use MRM (Micro-Ring Modulators), which enable miniaturization of the photonics to fit in the limited space available for CPO.


Fig. 18: Nvidia CPO Optical Engine on GPU/Switch Interposer. (Nvidia OFC)

Initial CPO deployments may start with a single or a few wavelengths. DWDM increases the number of wavelengths on a single fiber to 2, 4, 8, and 16. And potentially another 2, 4, 8, 16 in the other direction (bidirectional). Increasing the number of wavelengths makes the laser modules for complex, increases the number of MRMs required, requires wider bandwidth transmission of the 2D grating couplers, etc., so the industry likely will move incrementally from single/few wavelengths to lots of wavelengths. The benefit of DWDM is more bandwidth at lower power, once you can get all the pieces to work together in volume.

Optical circuit switching is coming to every level of data center switching
Google is the pioneer of OCS (Optical Circuit Switching). It developed its own OCS and deployed it in all of its data centers at the top of the switching hierarchy to replace traditional electric switches, achieve lower latency, reduce power 40%, and reduce CapEx. OCS enables dynamically reconfigurable networking to quickly map around failures and to optimize the network for shifting workloads.

Google has begun to outsource its OCS requirements to Lumentum and Coherent, which developed OCS decades ago for telecom applications. In just a few quarters, Lumentum and Coherent went from seeing $100M of revenue potential to $400M of revenue potential. Then, recently, Lumentum announced a billion-dollar deal with a single customer. OCS is hot.


Fig. 19: OCS TAM is growing rapidly. (n-Eye OFC)

The total available market was driven by Google early on, but other hyperscalers are kicking in, which will boost the TAM to over $3 billion, according to CignalAI. The TAM could be much bigger over time as the number of applications increases and OCS specs improve.


Fig. 20: Seven Google 64-TPU Racks work with one OCS rack. (Google OFC)

Google has a unique scale-up architecture. Each TPU has 6 high-bandwidth links (copper) that are used to form a 4x4x4 hypercube of 64 TPUs. There is no switch. The switching functionality is in the TPU itself. Optical interconnect is then used to connect all the racks to the OCS rack to create a larger pod, with up to 9,216 TPUs.


Fig. 21: Optics enables scale-up to 9216 TPUv7 = 144 racks. (Google OFC)

With such huge pod sizes, the scale-out network shrinks in relative size, because the vast majority of traffic is now within the pods.

Lumentum and Coherent are the immediate beneficiaries from the ramp of Google’s shift to external OCS supply and the growing interest of other hyperscalers.


Fig. 22: Lumentum 300×300 radix OCS R300 switch. (Lumentum OFC)

Lumentum’s solution is similar to Google’s, using MEMS (micro-electromechanical) mirror arrays. The benefit of this approach is a low insertion loss (IL) of <1.5 dB and ultra-wideband transmission in O and C bands. O band is what is being used for CPO. Ultra-wideband means that all of the frequencies in the O band are transmitted within the insertion loss spec, enabling large numbers of wavelengths. The disadvantage of Lumentum’s approach is that it is relatively bulky, hard to shrink, and has a lot of precision mechanical steps affecting cost and reliability. Coherent has a different approach using liquid crystals that also involves mirrors and volume.

An Nvidia researcher spoke at OFC about how OCS can be used in the next five years in the data center – he stressed this is his opinion, not the corporate roadmap. He sees OCS having a role at ALL layers of the data center switching hierarchy.


Fig. 23: OCS insertion points in the AI data center. (Nvidia OFC)


Fig. 24: OCS for scale-out. (Nvidia OFC)

Nvidia, like Google, sees OCS in scale-out as increasing resilience to network failures, allowing reconfiguration of the network for new jobs, and flattening the network by replacing 1 or 2 layers of electrical switches (and their power and latency).


Fig. 25: OCS for scale-up. (Nvidia OFC)

NVIDIA sees OCS enabling scale-up to be more flexible and efficient for large scale-up deployments.


Fig. 26: Several factors will affect the rate of OCS deployment. (Nvidia OFC)

For OCS to spread rapidly in the data center, several things are required:

  • Because link budgets are tight, OCS needs no or very low loss (amplification?)
  • Scale up bandwidth density requires >thousands of OCS switch ports per switch rack
  • OCS with fewer, modular, replaceable components to minimize the blast radius
  • Lower cost OCS: reduce components, more integration

Existing volumetric, mechanical OCS solutions will unlikely be able to meet the Nvidia researcher’s wish list. On the other hand, hyperscalers strongly prefer established suppliers and will buy from them unless a start-up OCS is the only solution for some application.

Silicon photonics has the potential to meet the demanding requirements that Nvidia is seeking. In a silicon photonics OCS switch, all the input fibers are fed into the photonics chip, which does the switching and outputs to all of the output fibers.

There are three start-ups in this space: iPronics (Valencia Spain), n-eye (Santa Clara CA), and Salience (Oxford England). Each has very capable teams and differentiated technology approaches which, if they can execute, can provide a superior OCS solution.


Fig. 27: Three 2-dimensional photonics OCS players. (n-eye OFC)

Lumentum at OFC presented its perspective on the various OCS technologies.

Fig. 28: Comparison of multiple OCS technologies. (Lumentum OFC)
The robotic OCS mentioned here is a “pick-and-place” robot arm that can plug and unplug transceiver cables in a rack, which is too slow for the Google-type OCS market.

Speed in the table refers to circuit switching speed. How long does it take to re-route some or all the optical circuits? Nvidia said switching speed is not a critical metric in the next five years, but it could become more important in the long run. The solid-state (waveguide/SiP) solutions are much faster on switching speed than the existing suppliers.


Fig. 29: n-Eye switching speed on prototype switch chip. (n-Eye OFC)

n-Eye showed a plot of one chip switching one circuit in ~1 microsecond. This is the chip-level switching speed. Since the hyperscalers are buying an OCS box, the switching time also needs to include the control circuitry — time from a command sent to the OCS’ processor, processing time, activation of control circuits, Si-Pho switch time.


Fig. 30: n-Eye 2D OCS architecture. (n-Eye OFC)

n-Eye’s technical approach includes MEMs, unlike iPronics and Salience. The silicon photonics has a crossbar of waveguides. When activated, the pushes the output-layer of waveguides into near contact with the input-layer, causing light to flow from input to output with low loss. The CMOS chip provides the control signals that activate the MEMS switches. Their loss is low enough that they don’t think they need amplification (although Nvidia said loss needs to be zero, which would require amplification even with n-Eye’s impressively low signal loss).

n-Eye was not showing a product at OFC. Results are based on prototype chips, with product chips in development.


Fig. 31: iPronics 32×32 OCS demonstration (iPronics OFC)

iPronics has sold dozens of 32×32 OCS product switches to customers, primarily hyperscalers and telecom infrastructure majors. A Cornell professor presented some technical results that were based on an iPronics 32×32 OCS switch.


Fig. 32: iPronics technical results for its 32×32 OCS. (iPronics OFC)

iPronics (and Salience) use SOA (semiconductor optical amplifier) amplification. iPronics showed they have excellent broadband performance across the O-band of wavelengths used in pluggable transceivers and CPO. This means they can potentially operate with the most advanced, maximum wavelength DWDM implementations coming in the future: the linearity of the SOA across the O-band needs to be verified in extensive testing to there is no wavelength mixing which could happen with non-linearity in the SOA.


Fig. 33: iPronics OCS roadmap from 32×32 to 144×144 and beyond (iPronics OFC)

iPronics demonstrated an operational 32×32 switch. iPronics presented its roadmap which doubles OCS density every year.


Fig. 34: iPronics OCS technology stack (iPronics OFC)

As with n-Eye, iPronics has control electronics (FPGA moving to ASIC) which controls the operation of the phtonics switch under software control.

iPronics showed that they are in development of a modular OCS in a very compact form factor which can enable 1000s of switch ports in a 4U box (remember Nvidia’s request on slide 26 for 1000s of switch ports per rack).


Fig. 35: iPronics modular, compact form factor OCS in development (iPronics OFC)


Fig. 36: iPronics 4U box with 12 cards of up to 128 radix OCS = 1,536 ports (iPronics OFC)

Salience Labs also showed their 32×32 OCS switch board in full operation at their booth: 16 inputs and 16 outputs running simultaneously and some other ports running BER tests. The Salience approach appears more like iPronics than n-Eye.


Fig. 37: Salience’s 32×32 OCS switch. (Salience Labs OFC)

The front panel has 32 inputs and 32 outputs. The white wires are gathered into bundles with higher-density connectors at the top, which feed into the photonics switch in the red rectangle. Outputs are routed to the semiconductor optical amplifier (SOA) in the green rectangle, then back to the output of the front panel. There is a processor under the heatsink for control and communications with the rest of the data center.

OFC 2026 showed an impressive array of OCS choices and aggressive development roadmaps by all vendors. Vendors are likely to win in different market segments that best fit their strengths.

CMOS execs need to understand optics and how to integrate with it

Optics is taking over all high-bandwidth interconnects in the data center. GPUs/XPUs, switches, and other devices will directly couple with optical engines. OCS will supplement and partially replace existing silicon switching architectures. Optical will change the data center architecture and the architecture of CMOS chips in the data center. Winning CMOS execs will learn how to co-operate with optics and maximize their efficient use of it.

Next month we’ll finish this article covering Lasers, Fibers and SiPho Waveguides.



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