Costs can rise with chiplets. Will that change? Will it matter?
Key Takeaways:
Chiplets are notoriously expensive and finicky today, and they raise questions about how costs can be managed and reduced. If chiplets are to reach their full potential, those issues will need to be solved.
Those considerations are not the primary drivers of chiplets today, however, which are riding a wave of money now flooding into data centers. We have to look to cost-sensitive markets, such as consumer and automotive, to determine whether the economics will ever pencil out.
Let’s say you take one large monolithic die and break it into 10 different chiplets. Assuming some functionality on the monolithic version requires an expensive node, but cutting things up to keep the advanced-node die as small as possible improves yield and reduces costs.
The other nine chiplets presumably would be built on other nodes that are less expensive, thanks to higher yields. But countering the cost savings from the advanced node is the fact that you now need 10 masks, not 1. You must process 10 different wafers, not 1. They should all yield better, but when you multiply the fabrication, test, burn-in, and other steps by 10, does that offset the original cost savings?
As examples:
Note that economic comparisons tend to compare chiplets to a single die. But you could also move components off the PCB and into the package, which is notionally what has happened with DRAM in the form of HBM.
“There is some confusion when people talk about the benefits of multi-die because they are not consistent in what they are comparing against — monolithic or PCB,” cautioned Marc Swinnen, director of product marketing at Synopsys. “For example, the claim that 3D-ICs have lower power consumption is true as compared to a PCB implementation, but false when compared to a monolithic chip. The claim that chiplets allow for more product flexibility and multi-process implementation is true compared to monolithic, but false when compared to PCB.”
A faulty premise
The verdict on that original premise was simple: “That’s not how it works.” In other words, yes, given the premise, there’s some math that must be run. No one seemed to think that it was a slam dunk, so the question itself wasn’t dumb. What was questioned was the premise itself.
“Your analysis is valid only if the multi-die assembly can be replaced by a single, monolithic chip,” said Swinnen. “And this is typically not the case. Even where the choice between chiplets and monolithic is technically possible, the manufacturing cost is but one variable amongst many to determine the best strategic choice.”
Yan Qu, director of marketing at UMC, agreed. “The rationale for adopting chiplet architectures over traditional monolithic designs extends well beyond simply economics,” he said. “Chiplets wouldn’t exist today if a large monolithic die could contain all the required features, including logic, memory, I/O, power management, and photonics in a single process, while still achieving reasonable yields.”
The numbers are more complicated than they might first appear. “If you look solely at mask set costs, the costs can seem dramatic,” said Qu. “A single mask set cost at the 2nm node is likely 30× that of a 65nm set. Yet in a chiplet design, designers can limit the use of expensive advanced nodes to only the most critical functions, while reusing IP blocks and leveraging less costly nodes for other functions. Although chiplets may require multiple mask sets, the overall cost can be lower due to improved yields and the ability to reuse chiplets across different designs.”
There’s nothing new about analyzing chiplet economics. In fact, the exercise started years ago. “Moore predicted in his original paper that this was the way that silicon was going to have to go,” said Pam Fulton, senior principal engineer at Intel Foundry.
What’s being challenged at present isn’t whether the economics works out, but rather the idea that economics is driving the decisions. We know that, for the time being, it matters less for the engines being designed for AI in the data center. But is that a long-term thing?
How the data center works
The premise of breaking up a monolithic die gets things somewhat backwards. It’s not that designers have a thing they could do with a large die, except that it’s too expensive. It’s more about designers wanting to implement something that is already too big for a reticle-limited die. It might be enough to cover multiple reticle-sized dies.
“Developers want to make six reticles worth of silicon,” said Luke Garner, director of advanced packaging at Intel Foundry. “And they break and divide that up between their SerDes die, their memory interfaces, and all those other bits.”
It’s not that such a function would be too expensive to do monolithically. It’s impossible to do monolithically. So the question then becomes how to break up the monster function into manageable, manufacturable bites. And those bites may themselves be large, putting the lie to the sense that chiplets are small.
“You don’t see tiny, tiny chiplets, but rather fairly substantially large chiplets,” said Garner.
This process involves the kind of economic math we’ve been discussing, except that the result drives a different decision. It’s not, “Is it cheaper to do chiplets?” It’s more, “This is all expensive, so which is the least expensive way to do it? And even then, is it too expensive?”
“Overall, developers do the math and they think, ‘Okay, this comes out all right,’” said Garner.
Numerous considerations go into whether a chiplet strategy makes sense. One of the more visible ones is that, when planning a family of products, chiplets enable low-cost scaling, where one or more chiplets can be replicated to add functionality or capacity across a range of products. We see this with CPU SKUs (stocking units) that multiply with each new release of a processor generation. The difference is that, for the most part, those SKUs have utility for various computing devices outside of the data center.
“If you’re a general-purpose CPU player, having lots of different SKUs [achieved by combining chiplets] does make sense,” noted Fulton. “But a cloud services provider building a monster data center won’t go that way because they don’t build multiple SKUs of the same product. They build one, and they just fill the entire room building with that one.”
So the chiplet mix-and-match thing isn’t a benefit for the data center.
The bottom line for the data center is that functionality within a power envelope matters above all. Pricing for chips and equipment is astronomical, so it can mask many of the economic ills that would be significant in any other market. Not coincidentally, this is where all the chiplet action is right now.
Where economics matter more
What about the “edge?” Here we’re talking not just about the AI craze that’s sucked most of the oxygen out of the air. Phones, automobiles, laptops, gadgets — all require computing (and yes, perhaps some AI too). The closer you get to the consumer, the more the single-monolithic-die approach predominates. Processor SKUs aside, pretty much everything is monolithic.
The classic example is the microcontroller (MCU). Philosophically, they scream for chiplets. Companies that make MCUs tend to offer a large number of configurations for different applications. The computing may stay the same for a family of units, but the memory and peripherals will vary. It sounds like a perfect scenario for chiplets: Instead of building all these monolithic chips, just build a series of chiplets and mix them in advanced packages.
And that’s where things bog down. Advanced packaging is expensive. Yes, you also have the multiple-wafer costs for the variety of chiplets, but their costs are amortized across the many different products they populate. Consumer pricing won’t tolerate advanced packaging today.
So the economics argues against chiplets today for these kinds of systems.
Will that change? First, we can expect that advanced packaging and the other technologies that chiplets leverage will experience production learning over the next several years. That will bring the break-even costs down further.
“While advanced packaging technologies — essential for integrating chiplets — do introduce additional costs and technical challenges, these costs are steadily decreasing as the technology matures,” said Qu. “Over time, we can expect advanced packaging to become more affordable and accessible, further enhancing the overall benefits of chiplet-based approaches.”
But will costs come down far enough to stimulate consumer use? That is still unclear.
The other elephant in the room is the desired chiplet marketplace. We’ve all seen the gleam in folks’ eyes as they consider the potential of such an industry to spur new designs and democratize access to advanced packaging. But from an economic standpoint, the math works differently. Someone building a chiplet for the marketplace isn’t likely to add up all the chiplets in a package for a single function to see how they fare in the face of real-world pricing expectations for the equipment built from them.
Presumably, a chiplet vendor will eye a function for which it feels it can create differentiating value. A specific chiplet containing, say, USB circuitry, might perform in a wide variety of applications. So there’s no one combination of chiplets to add up for a yes/no answer.
The purchasers of these chiplets will need to address their own economics. They’ll determine what a “fair” market price for a third-party chiplet might be. That price could vary by system. It’s up to the chiplet designers to figure out what price points they can address and for what systems. It’s still the same economics as above, but distributed among all the chiplet customers instead of being conveniently housed in one package.
“If you do get to that open chiplet world, then one person isn’t paying 10× the price because they’re breaking it up into 10 pieces,” said Garner. “Company A is producing piece number 1 for 16 customers, and the cost would be shared among them, as opposed to any one customer doing it all themselves.”
It’s always about the marketplace
And so, as always, we end up back in the chiplet-marketplace discussion. Opinions abound on whether it’s feasible. Commodity chiplets for 2.5D integration on interposers are more likely to succeed than those for 3D, because for 2.5D all you need is an agreement on shoreline. For 3D, one must standardize the entire footprint, bumps and all. That leaves less room for differentiation and industry alignment.
“To get six different parties to all agree [on a full footprint], I just never see that happening,” said Garner. “You’ll see more lateral situations with EMIB [Intel’s chiplet bridge interconnect] or some other 2.5D solution, where [the six parties] have to agree on 5 millimeters of shoreline.”
Standards are being worked on, but many of the processes and standards are at the package level, which used to contain one die. That’s no longer the case, but it affects the behind-the-scenes process steps that have historically been standard.
“If I’m just selling a chiplet and not a product, how do you burn it in? asked Fulton, addressing but one such step. “Do you burn it in at the wafer level, or do you have to let whoever is integrating it into their package do that? Do they do the burn in at the product level? The specs are all written from a product and package level. They’re not written from the die level (which doesn’t mean they couldn’t be…).”
In addition, the marketplace idea seems more about supplier push than customer pull. “Most of the customers interested in pushing chiplets are the ones that can manage the integration,” explained Fulton. “The customer-pull piece of it is still based on those big companies. The mix-and-match without much integration effort is not a thing yet.”
Today, economics matter, but they’re not driving the chiplet industry. As costs go down, that may change, allowing chiplets to move into markets where economics is a primary consideration. The remaining questions are whether costs can come down enough, and whether a marketplace will ever materialize. But at least the economics will retake their primary position in the calculus of what to build and how to build it.
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Yup! Way back when, we explored using chiplets in phones, and as you say, it’s all about the economics. We did quite a thorough study of tradeoffs – some described in one of my books. All about die size and yield and cost of packages…