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Synopsys, Inc.

Broad-line supplier of EDA, IP and software testing tools.
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Description

Synopsys is the largest of the Big Three EDA suppliers by revenue and a major supplier of semiconductor IP.

Founded in 1986, Synopsys develops a complete flow of EDA software, from initial design and system modeling through verification and design for manufacturability. The company also provides tools for early software prototyping and virtualization, and for determining the integrity of software that runs on hardware across a variety of vertical markets. It also develops tools for optical communication and TCAD, and IP ranging from standard interfaces to memory controllers and audio subsystems. Target markets are IoT, including wearables and smart medical devices, automotive/autonomous vehicles, and security.

The company’s license structure ranges from renewable TSLs to term licenses and perpetual licenses.

Synopsys also offers design consulting services and cloud-based services. It is the first EDA company to cross the $2 billion revenue threshold.

Executive Insight: Aart de Geus
Synopsys’ chairman and co-CEO looks into the future of Moore’s Law, security, the Internet of Smart Everything, and new opportunities around software.

  • HQ: Mountain View, CA, USA
  • Web: URL
  • Other names: Synopsys. Synopsys, Inc. used to be known as Optimal Solutions, Inc. until 1987. In 1987, Optimal Solutions changed it’s name to Synopsys.
  • Type: Company

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  • Synopsys, Inc. used to be known as Optimal Solutions, Inc. until 1987. In 1987, Optimal Solutions changed its name to Synopsys.

Synopsys Logo

  • Type: Company

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DDR PHY Training

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Building A Safety Verification Flow

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Timing Closure At 7/5nm

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Enterprise-Class DRAM Reliability

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Fusing Implementation And Verification

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Hybrid Prototyping

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Automotive Chip Design Workflow

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Tradeoffs In Embedded Vision SoCs

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Using Static Analysis For Functional Safety

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Distributed Design Implementation

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Die-To-Die Connectivity

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The New CXL Standard

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Visually Assisted Layout In Custom Design

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Compressing High-Bandwidth Video

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Signoff-Compatible CDC

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Holes In AI Security

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Analog Fault Simulation

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New Challenges For Data Centers

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Automotive System Design

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Verification at 7/5nm

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Safety Critical Design In Automotive

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Debug Changes At Advanced Node

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Designing An AI SoC

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Reverse Debug

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Designing Networking Chips

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Boosting Analog Reliability

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Formal Signoff

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Making Sense Of DRAM

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Formal Datapath Verification

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Thermal Impact On Reliability At 7/5nm

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UPF-Aware Clock-Domain Crossing

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Changing The Design Flow

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M2M Network Impact

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In-Design Power Rail Analysis

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Designing In The Cloud

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Emulation-Driven Implementation

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On-Chip Variation

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5/3nm Parasitics

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Writing Software (2016)