Chip Industry Week in Review


Check out the Inside Chips podcast for our behind-the-scenes analysis of changes at Intel Foundry. Intel rolled out its updated process technology roadmap this week, along with early process design kit (PDK) for its 14A gate-all-around process technology. That node will utilize high-NA EUV, and include direct contact power delivery, the second generation of its backside power delivery techno... » read more

Functional Safety Insights For Today’s Automotive Industry


As cars have evolved into rolling computing platforms, vehicle safety now extends well beyond the traditional seat belt. While they still take us to the grocery store, they also integrate advanced technology, enabling the rapid fusion of multimodal data through edge devices such as sensors and actuators. Modern vehicles offer unprecedented safety, but they can contain between one to three th... » read more

Cyber Threats Multiply With Commercial Chiplets


The commercialization of chiplets will significantly boost the potential for attacks on hardware, requiring a much broader set of security measures and processes at every level of the supply chain, including traceability from initial design to end of life. Much progress has been made in recent years on security measures, including everything from identifying unusual data traffic inside a chi... » read more

Smarter Cars, Higher Stakes


Artificial intelligence is turbocharging automotive innovation, but it's also unleashing a tangle of high stakes risks that engineers and security experts are scrambling to contain. The push to embed AI deep into today’s vehicles is changing how cars are built, how they handle the road, and how they keep passengers safe. But as onboard intelligence expands, so do the risks. AI systems that... » read more

From Tool Agents To Flow Agents


Experts At The Table: AI is starting to impact several parts of the EDA design and verification flows, but so far these improvements are isolated to single tool or small flows provided by a single company. What is required is a digital twin of the development process itself on which AI can operate. Semiconductor Engineering sat down with a panel of experts to discuss these issues and others, in... » read more

Blog Review: Apr. 30


Cadence’s Sree Parvathy points out how electrothermal analysis can help designers understand how temperature changes affect device behavior, such as mobility, threshold voltage, and saturation to mitigate potential failures due to thermal overstress. In a podcast, Siemens’ Conor Peick, Dale Tutt, and Mike Ellow chat about the transition towards software-defined products and why companies... » read more

Security Power Requirements Are Growing


Determining how much power to budget for security in a chip design is a complex calculation. It starts with a risk assessment of the cost of a breach and the number of possible attack vectors, and whether security is active or passive. Different forms of root of trust and cryptography have different power costs. Different systems could require tradeoffs between performance and security, whic... » read more

Chip Industry Week in Review


To listen to the podcast version, click here. TSMC unveiled an unusually detailed roadmap at this week's North America Technology Symposium, including future architectures for 3D-ICs for high-performance computing and small, extremely low-power chips for AR/VR glasses, and two implementations of system-on-wafer. Fig. 1: TSMC's future packaging and stacking roadmap. Source: TSMC The ... » read more

AI Drives Re-Engineering Of Nearly Everything In Chips


AI's ability to mine patterns across massive quantities of data is causing fundamental changes in how chips are used, how they are designed, and how they are packaged and built. These shifts are especially apparent in high-performance AI architectures being used inside of large data centers, where chiplets are being deployed to process, move, and store massive amounts of data. But they also ... » read more

AI-Driven Verification Regression Management


By Paul Carzola and Taruna Reddy Coping with the endless growth in chip size and complexity requires innovative electronic design automation (EDA) solutions at every stage of the development process. Better algorithms, increased parallelism, higher levels of abstraction, execution on graphics processing units (GPUs), and use of AI and machine learning (ML) all contribute to these solutions. ... » read more

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