Chip Industry Technical Paper Roundup: Apr. 14


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Device/circuit simulations of silicon spin qubits based on a gate-all-around transistor 🔗 Teikyo University, RIKEN Causal AI For AMS Circuit Design: Interpretable Parameter Effects Analysis 🔗 University of Florida Reliability of Wide B... » read more

Chip Industry Week In Review


Deals IBM and Arm are collaborating on a new dual‑architecture hardware aimed at enterprise AI and data-intensive workloads, using virtualization to boost reliability, security, scalability, and software compatibility. The goal, according to an IBM spokesperson, is to deliver side-by-side deployments of S390x-Linux and Arm-Linux virtual machines in a single kernel-based hypervisor. Nv... » read more

Why Co-Packaged Optics Should be Viewed as an Architectural Commitment (UW-Madison, MIT et al.)


A new technical paper, "3D optoelectronics and co-packaged optics: when solving the wrong problems stalls deployment," by the University of Wisconsin, MIT, and Invictus Innovation EV Technology. Abstract "The rapid growth of AI and accelerator-driven workloads is forcing a fundamental rethinking of optical interconnect architectures in datacenters. Co-packaged optics and three-dimensional... » read more

Research Bits: Mar. 31


2D hard mask material Researchers from Penn State University and University of Chemistry and Technology Prague propose using the 2D material chromium oxychloride (CrOCl) as a hard mask, because its layered structure is resistant to plasma etching and enables it to be an effective mask at smaller thicknesses. “This 2D material is like lasagna. It’s a layer-by-layer structure,” said Zih... » read more

Research Bits: Mar. 17


Photonic ski jumps Researchers from Massachusetts Institute of Technology (MIT), MITRE, University of Arizona, and Sandia National Laboratories developed a new class of photonic devices that enable the precise broadcasting of light from a chip into free space. The chip uses an array of microscopic structures that curl upward, resembling tiny ski jumps, and allows control over how light is e... » read more

Chip Industry Week In Review


Disruptions caused by the Iran conflict have taken about one third of the global helium supply off the market, an essential gas for semiconductor manufacturing, reports the World Economic Forum. Other potential impacts for the chip industry include bromine and other chemical shortages, logistical disruptions, and higher energy prices incurred by fabs in Asia. Top Deals IBM and Lam R... » read more

Chip Industry Technical Paper Roundup: Mar. 3


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations AutoGNN: End-to-End Hardware-Driven Graph Preprocessing for Enhanced GNN Performance 🔗 KAIST, Panmnesia, Peking University, Hanyang University, Pennsylvania State University Sputtering-driven formation of interstitial oxygen for intrinsic NIR detec... » read more

Chip Industry Week In Review


Big Deals and Fundings Rapidus secured US$1.7B in a new funding round from the Japanese government and the private sector to ramp 2nm production by next year. Open AI announced a $110B in new funding, with $30B from Nvidia, $30B from Softbank and $50B from Amazon. In a $100B multi-year deal, Meta will power its AI infrastructure with up to 6GW of AMD's GPUs. SambaNova and Intel ar... » read more

Accelerator Architecture: Fusion-Aware Mapper (MIT)


Researchers from MIT published "Fast and Fusiest: An Optimal Fusion-Aware Mapper for Accelerator Modeling and Evaluation." Abstract "The latency and energy of tensor algebra accelerators depend on how data movement and operations are scheduled (i.e., mapped) onto accelerators, so determining the potential of an accelerator architecture requires both a performance model and a mapper to sea... » read more

Chip Industry Week In Review


Geopolitics U.S. lawmakers are urging tighter export controls on advanced semiconductor manufacturing equipment (SME) to China, warning existing loopholes threaten national security. "China is working to build domestic SME by exploiting access to U.S. and allied subcomponents required to produce tools," states the letter, which also says better coordination with allies is essential. The U.S.... » read more

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