Chip Industry Week In Review

Preparing for sub-1nm; Iran war fallout on chips; Embedded World announcements; ramping Japan; foundry rankings; MIPI PHY IP; clocking tech; cybersecurity policy; imec’s new consortium; neuromorphic computing.

popularity

Disruptions caused by the Iran conflict have taken about one third of the global helium supply off the market, an essential gas for semiconductor manufacturing, reports the World Economic Forum. Other potential impacts for the chip industry include bromine and other chemical shortages, logistical disruptions, and higher energy prices incurred by fabs in Asia.

Top Deals

  • IBM and Lam Research signed a 5-year collaboration to develop materials, process flows, and high-NA EUV techniques aimed at enabling sub-1nm logic scaling.
  • Nvidia will invest $2B in Nebius as part of a strategic partnership to develop and deploy hyperscale cloud for the AI market.
  • UMC, HyperLight, and Wavetek formed a manufacturing partnership to move HyperLight’s thin-film lithium niobate chiplet platform into high-volume production on both 6-inch and 8-inch wafers.
  • Applied Materials inked deals with SK hynix and Micron, focused on next-gen memory technologies.
  • Adeia and UMC expanded their IP licensing agreement, giving UMC continued access to Adeia’s semiconductor portfolio, including hybrid bonding technologies.

At Embedded World in Nuremberg, Germany:

At its inaugural Synopsys Converge conference, the company launched Ansys 2026 R1, delivering four Synopsys-Ansys joint solutions; an electronics digital twin (eDT) platform, and new SW-defined, HW-assisted verification tools for AI-era mega designs.

Meta announced four new in-house AI chips developed with Broadcom, scheduled to roll out in the next two years, and aimed at GenAI, inference, and ranking and recommendation applications.

Financial Releases: TSMC (Feb. revenue).

Global

Europe

  • Imec launched a university consortium focused on next-generation chip technologies, bringing together academic partners to work on future semiconductor architectures, materials, and system-level integration challenges.
  • The UK‘s Microgravity Research Center opened its doors. Space manufacturing company Space Forge is the first to use its full suite of semiconductor processing and characterization tools.
  • TU Munich and NEURA are setting up the world’s largest R&D robotics center.
  • IonQ and Cambridge will jointly establish a quantum innovation center.
  • Great Britain said it will tighten national security investment screening rules by creating standalone categories for semiconductors and critical minerals. The move signals a more explicit view that advanced chip capabilities are strategic assets requiring closer scrutiny of foreign investment and ownership.

Americas

  • Dupont-spinoff Qnity opened a new 385,000 sq. ft. facility in Delaware for CMP pads used in semiconductor fabrication.
  • Infleqtion expanded its partnerships with several U.S. national labs.

Asia/Australia

  • ASE broke ground on a new ~US$560M facility in Kaohsiung to expand advanced packaging, testing, and smart logistics capacity, with completion targeted mid-2028.
  • Japan set a target of raising annual sales of domestically produced semiconductors to 40 trillion yen (~US $251B) by 2040, up from about 8 trillion yen today, reports Reuters.
  • Cortical Labs is using its CL1 silicon chip topped with 200,000 lab-grown human neurons to power data centers in Australia and Singapore, reports Bloomberg.
Funding, Deals, Reports

M&A, Collaborations

More deals and funding

Reports

  • TrendForce said the top 10 global foundries generated nearly $46.3B in revenue in Q4 2025, up 2.6% sequentially. The report also showed Samsung gaining foundry share and returning to profitability, while Tower moved up in the rankings on stronger silicon photonics and SiGe demand tied to emerging server applications.
  • Rising memory and CPU prices could push up mainstream notebook prices  by nearly 40%, according to TrendForce.
  • Memory Price Surge Triggers Shifts in Smartphone BOM Structure (Counterpoint)
  • Other reports: smartphone production, cellular IoT modules, and Wi-Fi 7.

Insights, Opinions


Research

Argonne scientists used aerosol jet printing and custom nanoparticle inks to build up layers to form electronic parts.

MIT and MITRE researchers developed a photonic device that enables the precise broadcasting of light from the chip into free space in a scalable way, using an array of microscopic structures that curl upward, resembling tiny, glowing ski jumps.

UC San Diego researchers developed a neuromorphic platform with memory and computation on the same chip, allowing components to interact collectively like neurons in the brain. It’s made of neodymium nickelate, a quantum material with unusual electronic properties.

In two studies, researchers from Stanford developed new approaches to LEDs and sensors, emitting longer wavelengths (4,000 to 5,000nm) that are good for sensing gas in the air and for medical applications.

imec detailed Si MOS quantum dot spin qubits, a multilinear quantum dot array enabled by EUV lithography for scaling up.

New papers:

New Technology

Silvaco released the Mixel MIPI PHY IP portfolio and multi-standard SerDes IP, including MIPI C-PHY/D-PHY combo IP and LVDS/D-PHY combo.

OCP’s Ethernet for Scale-Up Networking (ESUN) initiative launched its first major specification for AI infrastructure, enabling highly reliable and lossless Ethernet and efficient multi-hop scale-up topologies.

Movellusclocking technology was included in Synopsys’ SLM and advanced clock generator IP, enabling power architects to dynamically adapt SoC profiles to environmental and workload changes, optimizing performance and power. The clocking technology will also be used in Quicklogic’s rad-hard FPGA program.

Keysight released a 220 GHz lightwave component analyzer; a scalable 1.6T Ethernet AI workload emulation platform to validate AI fabrics operating over 224G SerDes; and functional interconnect test solutions.

IBM released a reference architecture for quantum-centric supercomputing that lays out how quantum processors can be integrated with CPUs, GPUs, networking, and shared storage across on-premises systems and the cloud.

Memory

  • Everspin launched a unified MRAM memory family.
  • SK hynix successfully validated LPDDR6 based on its latest 1c DRAM process, achieving 33% faster speed and 20% improved power efficiency versus LPDDR5X, ideal for on-device AI.

Optical

Automotive
New vehicle chips and technology

Government actions

  • DARPA announced a new X-76 plane with  “runway-independent, high-speed flight.”
  • Joby will begin operating its air taxis in 10 states in 2026, as one of the partners under the federal eVTOL program.
  • NHTSA announced a recall on certain batteries made by Webasto Thermo & Comfort due to the battery potentially failing and catching fire due to high voltage.

Vehicle technical papers

Security

CSIS rings the alarm bell that weak or no encryption on commercial satellites puts citizens’ communications at risk. The think tank also analyzed the new US National Cyber Strategy, emphasizing that while the strategy does have intelligent declarations, the execution of those declarations will be difficult.

Interface takes a look at how the United Nations is tackling cybersecurity and how the UN’s first permanent Global Mechanism will shape international cybersecurity.

New security offerings:

CISA announced new additions to its Known Exploited Vulnerability catalog, including some from GitHub, SolarWinds, and Ivanti.

Recent security research:

Workforce, Education

San Jose State University and Teradyne launched a two-year partnership to expand hands-on education in memory test engineering, including a new electrical engineering elective developed with Teradyne engineers, guest lectures, and access to advanced test equipment.

The Bipartisan Policy Center offers a stern warning in its comprehensive national talent report, encouraging a more “coherent, connected, and forward-looking approach to education, workforce preparation, and support for workers.”

India has made significant progress toward its 10-year goal of training 85,000 semiconductor design engineers in just four years, utilizing EDA tools in 315 academic institutions, soon to expand to 500 universities.
New Challenges In Signoff: What else to consider before sending a design to manufacturing.

Events and Further Reading

Upcoming webinars are here, including:

Find upcoming chip industry events here, including:

EVENTS Date Location
OFC: The future of optical networking and communications Mar 15 – 19 Los Angeles, CA
Nvidia GTC Mar 16 – 19 San Jose, CA
International Conference on Frontiers of Characterization and Metrology for Nanoelectronics (FCMN) Mar 16 – 19 Monterey, CA
Infineon’s Wide-Bandgap Developer Forum 2026 Mar 17 Virtual/ CET
IRPS 2026: International Reliability Physics Symposium Mar 22 – 26 Tucson, AZ
Applied Power Electronics Conference and Exposition Mar 22 – 26 San Antonio, TX
RSA Conference Mar 23 – 26 San Francisco
SEMICON China Mar 25 – 27 Shanghai
MEMS and Sensors Executive Conference Mar 31 – Apr 2 Boston
Find all events here.



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