Power/Performance Bits: Aug. 25


AI architecture optimization Researchers at Rice University, Stanford University, University of California Santa Barbara, and Texas A&M University proposed two complementary methods for optimizing data-centric processing. The first, called TIMELY, is an architecture developed for “processing-in-memory” (PIM). A promising PIM platform is resistive random access memory, or ReRAM. Whil... » read more

DAC 2020 Day One


DAC 2020 is like no other Design Automation Conference. It is virtual for this year — and hopefully only this year. The COVID pandemic has proven that face-to-face meetings and conferences are invaluable for many reasons. But with none of the distractions of a traditional conference, focusing on the content was easy. And because the sessions have been pre-recorded, the speakers for each se... » read more

Power/Performance Bits: July 21


AI hardware Researchers at Purdue University, University of California San Diego, Argonne National Laboratory, University of Louisville, Brookhaven National Laboratory, and University of Iowa developed hardware that can learn skills, offloading some of the energy needed by AI software. "Software is taking on most of the challenges in AI. If you could incorporate intelligence into the circui... » read more

Power/Performance Bits: July 14


5G switches Researchers from the University of Texas at Austin and University of Lille built a new radio frequency switch that could save power in 5G devices when not actively jumping between different networks and spectrum frequencies. “It has become clear that the existing switches consume significant amounts of power, and that power consumed is useless power,” said Deji Akinwande, a ... » read more

Blog Review: March 4


Mentor's Shivani Joshi provides a primer on design rule checks and how they can help flag potential issues in PCB design. Synopsys' Taylor Armerding argues that while better IoT security requires a change in consumer culture and habits, manufacturers and government should be doing more as well. Cadence's Johnas Street chats with several colleagues about what Black History Month means to t... » read more

Power/Performance Bits: Feb. 18


Cryogenic memory Researchers at Oak Ridge National Laboratory demonstrated a new cryogenic memory cell circuit design based on coupled arrays of Josephson junctions. Such a memory could help enable exascale and quantum computing. The cells are designed to operate in super cold temperatures and were tested at just 4 Kelvin above absolute zero, about minus 452 degrees Fahrenheit. At these col... » read more

Power/Performance Bits: Jan. 28


Accelerator-on-chip Researchers at Stanford University and SLAC National Accelerator Laboratory created an electron-accelerator-on-chip. While the technique is much less powerful than standard particle accelerators, it can be much smaller. It relied upon an infrared laser to deliver, in less than a hair’s width, the sort of energy boost that takes microwaves many feet. The team carved ... » read more

Plasticine: A Reconfigurable Architecture For Parallel Patterns (Stanford)


Source: Stanford University Stanford University has been developing Plasticine, which allows parallel patterns to be reconfigured. "ABSTRACT Reconfigurable architectures have gained popularity in recent years as they allow the design of energy-efficient accelerators. Fine-grain fabrics (e.g. FPGAs) have traditionally suffered from performance and power inefficiencies due to bit-level ... » read more

More Knobs, Fewer Markers


The next big thing in chip design may be really big — the price tag. In the past, when things got smaller, so did the cost per transistor. Now they are getting more expensive to design and manufacture, and the cost per transistor is going up along with the number of transistors per area of die, and in many cases even the size of the die. That's not exactly a winning economic formula, which... » read more

Priorities Shift In IC Design


The rush to the edge and new applications around AI are causing a shift in design strategies toward the highest performance per watt, rather than the highest performance or lowest power. This may sound like hair-splitting, but it has set a scramble in motion around how to process more data more quickly without just relying on faster processors and accelerators. Several factors are driving th... » read more

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