How Hardware Can Bias AI Data


Clean data is essential to good results in AI and machine learning, but data can become biased and less accurate at multiple stages in its lifetime—from moment it is generated all the way through to when it is processed—and it can happen in ways that are not always obvious and often difficult to discern. Blatant data corruption produces erroneous results that are relatively easy to ident... » read more

Test On New Technology’s Frontiers


Semiconductor testing is getting more complicated, more time-consuming, and increasingly it requires new approaches that have not been fully proven because the technologies they are addressing are so new. Several significant shifts are underway that make achieving full test coverage much more difficult and confidence in the outcome less certain. Among them: Devices are more connected an... » read more

Advanced Packaging Options Increase


Designing, integrating and assembling heterogeneous packages from blocks developed at any process node or cost point is proving to be far more difficult than expected, particularly where high performance is one of the main criteria. At least part of the problem is there is a spectrum of choices, which makes it hard to achieve economies of scale. Even where there is momentum for a particular ... » read more

The Next New Memories


Several next-generation memory types are ramping up after years of R&D, but there are still more new memories in the research pipeline. Today, several next-generation memories, such as MRAM, phase-change memory (PCM) and ReRAM, are shipping to one degree or another. Some of the next new memories are extensions of these technologies. Others are based on entirely new technologies or involve ar... » read more

Manufacturing Printed Sensors


Vijaya Kayastha, lead device development engineer at Brewer Sciences, talks about the different approaches for different printed sensors, why each of those requires different skill levels for scaling up the process, and why this technology will be so important for industrial and IoT applications. » read more

Investigation and Methods Using Various Release and Thermoplastic Bonding Materials to Reduce Die Shift and Wafer Warpage for eWLB Chip-First Processes


Today's fan-out wafer-level packaging (FOWLP) processes use organic substrates composed of epoxy mold compound (EMC) created using a thermal compression process. EMC wafers are a cost-effective way to achieve lower profile packages without using an inorganic substrate to produce chip packages that are thinner and faster without the need for interposers or through-silicon-vias (TSVs). One approa... » read more

Material Choices In Printed Temperature Sensors


Vijaya Kayastha, lead device development engineer at Brewer Science, talks about what’s needed for printed temperature sensors, what happens when there are impurities in the materials, how these sensors respond to stress, and how costs compare to traditional sensors. » read more

Challenges Grow For 5G Packages And Modules


The shift to 5G wireless networks is driving a need for new IC packages and modules in smartphones and other systems, but this move is turning out to be harder than it looks. For one thing, the IC packages and RF modules for 5G phones are more complex and expensive than today's devices, and that gap will grow significantly in the second phase of 5G. In addition, 5G devices will require an as... » read more

Material Solutions For FOWLP Die Shift And Wafer Warpage


By Shelly Fowler Today's fan-out wafer-level packaging (FOWLP) processes use organic substrates composed of epoxy mold compound (EMC) created using a thermal compression process. EMC wafers are a cost-effective way to achieve lower-profile packages without using an inorganic substrate to produce chip packages that are thinner and faster without the need for interposers or through-silicon-via... » read more

What’s Next In Advanced Packaging


Packaging houses are readying the next wave of advanced IC packages, hoping to gain a bigger foothold in the race to develop next-generation chip designs. At a recent event, ASE, Leti/STMicroelectronics, TSMC and others described some of their new and advanced IC packaging technologies, which involve various product categories, such as 2.5D, 3D and fan-out. Some new packaging technologies ar... » read more

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