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Week In Review: Auto, Security, Pervasive Computing


Automotive/Mobility Chip-telemetry company proteanTecs has joined TSMC’s IP Alliance Program, which puts proteanTecs’ Universal Chip Telemetry (UCT) IP into TSMC’s catalog of production-proven IP. UCT is a monitoring system designed directly into chips to pull measurements from inside the chip throughout its lifecycle, including after placement in systems in the field. Monitoring the hea... » read more

Breaking The 2nm Barrier


Chipmakers continue to make advancements with transistor technologies at the latest process nodes, but the interconnects within these structures are struggling to keep pace. The chip industry is working on several technologies to solve the interconnect bottleneck, but many of those solutions are still in R&D and may not appear for some time — possibly not until 2nm, which is expected t... » read more

Marangoni Effect-Based Under-Layer For A Dual Damascene Via-First Approach


One of the main challenges of a Dual Damascene (DD) via-first process is the control of the Critical Dimensions (CDs) in the lithography of the trenches. The PhotoResist (PhR) thickness presents variations from the via arrays to the open areas, which cause the variation of CDs: the swing effect. The planarization of a DD via-first process is reported. A dual-layer solution is used to demonstrat... » read more

The Good, Bad And Unknowns Of Flexible Devices


Flexible hybrid electronics are beginning to proliferate in consumer, medical, and industrial applications due to their comparatively low weight, thin profile, and the ability to literally bend the rules of design. Open any smart phone today and you're likely to find one or more of these flexible boards. Unlike standard printed circuit boards, FHE devices are printed using a combination of r... » read more

Eyes On Zero Defects: Defect Detection And Characterization Metrology


By Darin Collins and Jessica Albright Metrology is the science of measuring, characterizing, and analyzing materials. Within metrology, there are several technologies used to detect material defects on a very small scale – precision on the scale of parts per trillion or less is necessary in the pursuit of zero defects. We broadly define our characterization approach into three main categor... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs Intel has appointed Pat Gelsinger as its new chief executive, effective Feb. 15. Gelsinger will also join Intel’s board upon assuming the role. He will succeed Bob Swan, who will remain CEO until Feb. 15. Most recently, Gelsinger served as the CEO of VMware since 2012. He also spent 30 years at Intel, becoming the company’s first chief technology officer. The move fo... » read more

CEO Outlook: 2021


The new year will be one of significant transition and innovation for the chip industry, but there are so many new applications and market segments that broad generalizations are becoming less meaningful. Unlike in years past, where sales of computers or smart phones were a good indication of how the chip industry would fare, end markets have both multiplied and splintered, greatly increasin... » read more

Variation Threat In Advanced Nodes, Packages Grows


Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

EUV Challenges And Unknowns At 3nm and Below


The chip industry is preparing for the next phase of extreme ultraviolet (EUV) lithography at 3nm and beyond, but the challenges and unknowns continue to pile up. In R&D, vendors are working on an assortment of new EUV technologies, such as scanners, resists, and masks. These will be necessary to reach future process nodes, but they are more complex and expensive than the current EUV pro... » read more

Improving EUV Underlayer Coating Defectivity Using Point-Of-Use Filtration


Authors: Aiwen Wu (Entegris, Inc. — United States), Hareen Bayana (Entegris GmbH — Germany), Philippe Foubert (imec — Belgium), Andrea Chacko and Douglas Guererro (Brewer Science, Inc. — United States). This paper describes efforts to leverage different filtration parameters, including retention ratings and membrane materials, to understand their impact on EUV underlayer coating defe... » read more

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