Chip Industry Week In Review


By Jesse Allen, Linda Christensen, and Liz Allan.  The Biden administration plans to invest more than $5B  for semiconductor R&D and workforce support, including in the National Semiconductor Technology Center (NSTC), as part of the rollout of the CHIPS Act. Today's announcement included at least hundreds of millions for the NSTC workforce efforts, including creating a Workforce Cente... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan. Cadence introduced an AI-based thermal stress and analysis platform aimed at 2.5D and 3D-ICs, and cooling for PCBs and electronic assemblies. The company also debuted a HW/SW accelerated digital twin solution for multi-physics system design and analysis, combining GPU-resident computational fluid dynamics (CFD) solvers with dedicated GPU hardwar... » read more

Money Pours Into New Fabs And Facilities


Fabs, packaging, test and assembly, and R&D all drew major funding in 2023. Companies poured money into offshore locations, such as India and Malaysia, to access a larger workforce and lower costs, while also partnering with governments to secure domestic supply chains amid ongoing geopolitical turmoil. Looking ahead, artificial intelligence (AI), quantum computing, and data applications... » read more

Chip Industry Week In Review


By Susan Rambo, Karen Heyman, and Liz Allan The Biden-Harris administration designated 31 Tech Hubs across the U.S. this week, focused on industries including autonomous systems, quantum computing, biotechnology, precision medicine, clean energy advancement, and semiconductor manufacturing. The Department of Commerce (DOC) also launched its second Tech Hubs Notice of Funding Opportunity. ... » read more

Chip Industry’s Technical Paper Roundup: September 26


New technical papers recently added to Semiconductor Engineering’s library: [table id=146 /] More Reading Technical Paper Library home » read more

3D-Integrated Neuromorphic Hardware With A Two-Level Neuromorphic “Synapse Over Neuron” Structure


A technical paper titled “3D Neuromorphic Hardware with Single Thin-Film Transistor Synapses Over Single Thin-Body Transistor Neurons by Monolithic Vertical Integration” was published by researchers at Korea Advanced Institute of Science and Technology (KAIST) and SK hynix. Abstract: "Neuromorphic hardware with a spiking neural network (SNN) can significantly enhance the energy efficiency... » read more

Sweeping Changes For Leading-Edge Chip Architectures


Chipmakers are utilizing both evolutionary and revolutionary technologies to achieve orders of magnitude improvements in performance at the same or lower power, signaling a fundamental shift from manufacturing-driven designs to those driven by semiconductor architects. In the past, most chips contained one or two leading-edge technologies, mostly to keep pace with the expected improvements i... » read more

Chip Industry Week In Review


By Liz Allan, Jesse Allen, and Karen Heyman Global semiconductor equipment billings dipped 2% year-over-year to US$25.8 billion in Q2, and slipped 4% compared with Q1, according to SEMI. Similarly, the top 10 semiconductor foundries reported a 1.1% quarterly-over-quarter revenue decline in Q2. A rebound is anticipated in Q3, according to TrendForce. Synopsys extended its AI-driven EDA ... » read more

Week In Review: Manufacturing, Test


Bosch completed its acquisition of TSI Semiconductors to expand its SiC chips business, reports Reuters. In April, Bosch announced plans to invest $1.5 billion in the Roseville, California, foundry to convert TSI’s manufacturing facilities into state-of-the-art processes, with the first SiC chips due out in 2026. Bosch CEO Stefan Hartung said the full expansion "depends on the support of the... » read more

Week In Review: Manufacturing, Test


TSMC, Bosch, Infineon, and NXP will jointly invest in the European Semiconductor Manufacturing Co. (ESMC), in Dresden, Germany, to provide advanced semiconductor manufacturing services. ESMC marks a significant step toward construction of a 300mm fab, which is expected to have a monthly production capacity of 40,000 300mm (12-inch) wafers on TSMC’s 28/22nm planar CMOS and 16/12nm finFET proce... » read more

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