Chip Industry Week In Review


Micron The memory maker rolled out a slew of announcements this week, including: Raised its planned U.S. investment to more than $250B through 2035, an incremental $50B above what was announced last June, with an ultimate goal of producing 40% of its DRAM in the U.S.; Planned new investments of $3B for U.S. IC supply-chain investments, including $500M in financing for GlobalWafers’ 3... » read more

Chip Industry Week In Review


Around the world South Korea unveiled a sweeping AI and semiconductor investment drive, planning three mega projects that tie semiconductors, physical AI/robotics, and AI data centers into a single industrial plan, with government support for regional chip clusters, packaging capacity, power, water, sites, and workforce development. Among the new investments: Samsung will spend $260B on n... » read more

Chip Industry Week In Review


IBM unveiled a 7Å transistor architecture that uses staggered nanosheet transistors stacked on a precisely beveled angle, almost like tiles on a roof. That allows more transistors to be crammed into a given area, boosting performance by 50% or power efficiency by up to 70%. Perhaps even more important, IBM claims a 40% improvement in SRAM scaling, which is orders of magnitude faster and lower ... » read more

Chip Industry Week In Review


Dealmaking Amkor inked a 10-year agreement with TSMC to provide advanced packaging and test services in Arizona, tying TSMC’s U.S. fab expansion to domestic OSAT capacity. Trump said in a post that Apple will partner with Intel on chip design and production in the U.S., marking a second reported win for the chipmaker this month. Intel Foundry will also reportedly manufacture 3 million... » read more

Chip Industry Week In Review


Notable deals Cadence and Intel Foundry inked a multi-year agreement to advance design technology co-optimization and create PDKs for Intel Foundry's 14A process. Nvidia and SK hynix announced a multi-year partnership to co-develop memory technology for AI infrastructure and physical AI. Teradyne unveiled an integrated test cell solution with TEL that supports known-good device scree... » read more

Chip Industry Week In Review


ECTC Panel-level packaging, hybrid bonding, new substrates, and fine-pitch interconnects topped the list of advanced packaging technologies at ECTC this week. Among the announcements: ASE launched an automated 310mm × 310mm panel-level packaging production line. Expected to enter production in the first half of 2027, the line is compatible with FOCoS and FOCoS-Bridge pa... » read more

Chip Industry Technical Paper Roundup: May 19


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Micro-Transfer Printing on Silicon Photonics: Tutorial, Recent Progress and Outlook 🔗 Ghent U., imec Challenges and prospects of 2D electronics for future monolithic CFETs 🔗 SKKU, Hanyang U. et al. A Device-Physics-Informed Artific... » read more

Flash Getting Stacked High-Bandwidth Version


Key takeaways: A new HBF 3D flash stack is similar to HBM for use in AI processing. HBF capacity will be much higher, allowing static storage of AI model weights, with optimized read speed. Samples are due out later this year, with accelerators featuring it coming out next year. AI inference using modern models requires billions of parameters, and moving them to where they c... » read more

HW-Based Image Generation Using FTJs (SNU, Sungkyunkwan U., SK hynix et al.)


A new technical paper, "CMOS-compatible ferroelectric tunnel junctions integrate stochastic sampling and deterministic computing for image generation," was published by researchers at Seoul National University, Sungkyunkwan University, Hanyang University, Sogang University, and SK Hynix. Abstract "Recent progress in generative modeling has intensified the need for compact, energy-efficien... » read more

Chip Industry Week in Review


Advanced nodes and capacity The US Commerce Dept. told IC equipment makers to stop shipments to Hua Hong Group, China's No. 2 chipmaker, in order to protect America's lead, according to Reuters. Global AI competition is causing wafer and packaging shortages, but capacity increases are expected to come online later this year and in 2027 to ease the crunch, according to TrendForce. Leadi... » read more

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