Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan Intel officially launched Intel Foundry this week, claiming it's the "world's first systems foundry for the AI era." The foundry also showed off a more detailed technology roadmap down to expanded 14A process technology. Intel CEO Pat Gelsinger noted the foundry will be separate from the chipmaker, utilize third-party chiplets and IP, and leverage... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan. Cadence introduced an AI-based thermal stress and analysis platform aimed at 2.5D and 3D-ICs, and cooling for PCBs and electronic assemblies. The company also debuted a HW/SW accelerated digital twin solution for multi-physics system design and analysis, combining GPU-resident computational fluid dynamics (CFD) solvers with dedicated GPU hardwar... » read more

Week In Review: Design, Low Power


Cadence will acquire Rambus' SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data center and AI,” said Sean Fan... » read more

Startup Funding: June 2023


June saw several large funding rounds, with seven of at least $100 million. Over half a billion dollars alone went to a Chinese company manufacturing silicon carbide (SiC) power semiconductors. The wide band gap material has seen steady interest from investors, particularly for its potential use in electric vehicles. Another of the month's mega-rounds went to a company designing RISC-V SoCs ... » read more

Chip Industry’s Technical Paper Roundup: May 16


New technical papers recently added to Semiconductor Engineering’s library: [table id=103 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us... » read more

Toolbox For Designing Heterogeneous Quantum Systems


A new technical paper titled "Microarchitectures for Heterogeneous Superconducting Quantum Computers" was published by researcher at: Pacific Northwest National Laboratory, Princeton University, University of Chicago, Rutgers University, MIT, Brookhaven National Laboratory, and Infleqtion. Abstract: "Noisy Intermediate-Scale Quantum Computing (NISQ) has dominated headlines in recent years, ... » read more

Week In Review: Design, Low Power


Tools, IP, design Codasip launched a new organization within the company to support the development and commercialization of technical innovations in key applications including security, functional safety, and AI/ML. "As semiconductor scaling is showing its limits, there is an obvious need for new ways of thinking. We will be working with universities, research institutes and strategic partner... » read more