Week In Review: Design, Low Power

RISC-V verification; seeking processor architecture innovation; memory for AI; PIC PDK; classical transistors for qubits.


Tools, IP, design

Codasip launched a new organization within the company to support the development and commercialization of technical innovations in key applications including security, functional safety, and AI/ML. “As semiconductor scaling is showing its limits, there is an obvious need for new ways of thinking. We will be working with universities, research institutes and strategic partners to enable innovation and empower our customers to stay at the forefront of processor architecture,” said Karel Masařík, Codasip founder and president.

Lumissil Microsystems, a division of Integrated Silicon Solutionreported that Mixel’s MIPI IP solution has been successfully integrated into Lumissil’s automotive microcontroller, which will go to production next year. Mixel provided  its 28nm ASIL-B compliant MIPI D-PHY CSI-2 RX+ IP which provided a 35% area reduction and a 50% reduction in standby power. The RX+ configuration enables higher data rate performance by minimizing the capacitive load at the high-speed serial interface pins and isolating the loop back test from any loading on the serial interface pins. Lumissil achieved first-time silicon success with Mixel PHY IP and will go to production in 2023.

MIPS selected Imperas to provide advanced RISC-V processor verification tools. “The Imperas Reference Model enables lock-step-compare with asynchronous events which is the foundation of our SystemVerilog testbench and verification methodology,” said Don Smith, Vice President Engineering at MIPS.

Additionally, Imagination Technologies approved the Imperas model of IMG RTXM-2200, the first core from Imagination’s RISC-V Catapult range, as a reference for software development in virtual platforms as well as supported EDA environments.

Telechips integrated Arteris IP’s FlexNoC interconnect IP into several SoC products for automotive. “Arteris’ proven interconnect IP technology ensures that we meet our design requirements to facilitate safety and scalable future products, helping us to drive global innovation trends. And, it will help our new business areas, especially ADAS and MCUs, meet the highest level of OEM and Tier 1 requirements,” said Moon Soo Kim, SoC group leader and VP of Telechips.

Keysight Technologies will expand its support for process design kit (PDK) and reference design flow creation for Intel’s upcoming advanced technology nodes as part of joining the Intel Foundry Services (IFS) Accelerator EDA Alliance program. Keysight will also integrate its EDA simulation software portfolio into the latest node reference design flow to deliver circuit, thermal, and electromagnetic (EM) analyses required for the development of complex radio frequency integrated circuits (RFICs).

Avery Design Systems updated its X propagation analysis tool, adding features for sequential false X analysis and automatic repair and improved analysis and debug of clock gating logic.

Ansys’ RedHawk-SC, RaptorH, and HFSS semiconductor tools for power supply integrity, electromigration reliability, and electromagnetic coupling were certified for GlobalFoundries’ 22FDX platform.

Samsung Electronics and Naver Corporation are collaborating to optimize Samsung’s computational storage, processing-in-memory (PIM), processing-near-memory (PNM), and Compute Express Link (CXL) technologies for AI workloads while refining Naver’s hyperscale language model and improving its compression algorithms to create a more simplified model that increases computation efficiency.


OpenLight debuted a process design kit (PDK) to create photonic ICs with optical amplifiers, on-chip lasers, and high-speed, low-loss modulators tailored to design requirements. It works with Synopsys photonic IC design solutions and includes indium phosphide active optical elements on-chip that can be directly used by OptoCompiler and simulated with the OptSim photonic simulator. The technology has passed qualification and reliability tests on Tower Semiconductor’s Silicon Photonics production flow.

EPFL scientists developed photonic integrated circuits that demonstrated a new principle of light amplification on a silicon chip. The traveling-wave parametric amplifiers achieve signal amplification by varying a small system ‘parameter,’ such as the capacitance or the nonlinearity of a transmission line. They say it can be employed for optical signals like those used in lidar, trans-oceanic fiber amplifiers, or in data center telecommunications.

Quantum computing

Fabless quantum computing startup Siquance launched to commercialize technology that can make classical transistors capable of handling qubits. The startup, a spin out from CEA and CNRS, says designing its quantum computing solution on existing semiconductor technology offers the quickest path to large-scale industrialization of a universal quantum computer by leveraging existing manufacturing capacities, particularly those available in French and European semiconductor fabs.

CEA-Leti and CNRS found that FDSOI technology can enable full fault-tolerant quantum computing leveraging silicon-based VLSI fabrication and design techniques. “FDSOI technology with its backgate provides a way to move the charges away from the interfaces in the qubits on one hand and on the other hand to recenter the Vt of transistors in the control electronics at low temperature. It is thus a unique option to design and fabricate high performance quantum systems-on-chip,” researchers wrote in a paper presented at IEDM. CEA-Leti researchers also presented a systematic three-step characterization protocol for qubit devices using up to 300mm automated probers at 300K and 1K.

PsiQuantum says it has found a way to more efficiently implement fault-tolerant quantum computations by utilizing long-range connections between different regions in the quantum computer. “The active volume technique reduces the computational time required and this can be translated into reduced hardware resources using techniques like photonic interleaving. This is also likely to be of practical importance in allowing programs to run in the same time using less hardware,” said Naomi Nickerson, VP of quantum architecture at PsiQuantum. The company expects this technique to deliver approximately a 50X improvement in the run-time efficiency of compiled applications.

QuantWare is now offering foundry services for superconducting quantum chips. “Opening up our foundry capabilities for the design of others massively lowers the barrier to build a quantum computer,” said Matthijs Rijlaarsdam, co-Founder and CEO of QuantWare. “It also prepares our company for future large-scale processors that, like in Semicon, will feature IP from different sources.”

IQM Quantum Computers and Keysight Technologies will team up to research the development of a quantum computing solution for on-premises high-performance computing and scientific workloads.

Stony Brook University was awarded a $6.5 million grant from the Long Island Investment Fund to construct a new Quantum Internet Test Bed, which will be a network of five nodes that are physically connected using commercially available optical fiber. The university aims to investigate and implement quantum technology in the context of telecommunications and the internet.

D-Wave Quantum and Hyperion Research take a look at the current state of quantum computing adoption, and what companies are planning to spend on it in the future, in a new report that surveys organizations currently engaged in some form of quantum computing efforts.

ColdQuanta changed its corporate name to Infleqtion. ColdQuanta will still be used as a brand name for the components and research division of the company.


In direct response to the predicted national shortage of engineers, Siemens Digital Industries Software announced Hour of Engineering, an online learning program to introduce students to engineering and technology with right-sized, kid-friendly learning content in as little as one hour. The STEM learning program is aimed at middle-school educators and students to inspire interest in engineering careers before high-school. The U.S. Department of the Census estimates there will be more than 125,000 vacant engineering positions on average annually through 2030.

Keysight’s Keysight University program launched a credential program to recognize learner completion of technology-related courses and boot camps. Keysight University is a free, online program for engineers to learn about design, emulation, and test fundamentals, understand new and emerging technologies and standards, gain engineering design tips, and discover best practices in their industries.

Sophomore students in electrical engineering or computer engineering at Missouri University of Science and Technology can receive scholarships, undergraduate research opportunities, and mentoring to encourage them to earn master’s degrees. “The most recent Bureau of Labor Statistics numbers show that employment in computer and information research is projected to grow 22% this decade,” said Sahra Sedigh Sarvestani, associate professor and distance learning coordinator in electrical and computer engineering at Missouri University of Science and Technology.

Upcoming events

Dec. 13-14, RISC-V Summit, San Jose, CA

Dec. 15, Club Formal India: The Forum For Formal Verification Users, Bengalruru, India

Find more events here.

Read more

Find out why thermal mismatch in heterogeneous designs can impact everything from accelerated aging to warpage and system failures in the Low Power-High Performance newsletter, along with why adaptive control is adding new challenges and an interview with the director of Fraunhofer IIS EAS about the next generation of electronics.

In the latest Systems & Design newsletter, developing a multi-vendor standard for plug-and-play chiplets is proving to be difficult. Plus, a look at the state of EDA tools for quantum chips; why virtual prototypes are hampered by a lack of abstractions, standards, and interfaces; and improving concurrent chip design, manufacturing, and test flows.

—Ann Steffora Mutschler contributed to this report.

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