Orbital Data Centers Are Souped-Up Satellites – For Now


Key Takeaways: Today’s orbital data centers are better described as compute centers in space, as they resemble satellite constellations more than terrestrial data centers. The most common power solution is sun-synchronous solar at the poles, but this requires a multi-hop data relay from power-hungry compute to standard satellite constellations in the low-orbit mesh, then to Earth. ... » read more

RISC-V And GPU Synergy In Practice: A Path Toward High-Performance SoCs


With the rapid growth of edge AI and high-performance computing demands, the division of roles within the processor industry is beginning to shift. Recent moves from the dominant CPU IP supplier has increased industry attention on the openness and ecosystem neutrality of the supply chain. Against this backdrop, the value of RISC-V CPU IP is becoming more evident. It offers chipmakers greater... » read more

Designing GPUs For Developers: A Conversation With Godot


Godot has rapidly established itself as one of the most important graphics engines in today’s ecosystem. Free, open source, and increasingly capable across 2D, 3D, mobile, desktop, and beyond, it represents a philosophy that resonates strongly with modern developers. In this conversation, Clay John—who leads Godot’s rendering team—shares how Godot thinks about performance, iteration,... » read more

Blog Review: Apr. 29


Synopsys' Madhumita Sanyal shows why interface IP has emerged as the keystone for building scalable, reliable 3D multi-die designs in which interconnects often have a greater influence on overall system capability than the peak performance of individual dies. Cadence's Frank Ferro checks out why SOCAMM2 built on LPDDR is being deployed in AI data centers, increasing memory bandwidth and capa... » read more

Moving Electrons, Not Just Vehicles


Key Takeaways: There are several ways to convert AC power from the grid to DC power in the system. Some degrade the battery faster than others. Battery management systems monitor cell voltage, current, and temperature, helping to estimate state of charge, health, and useful remaining life. A PMIC with a multi-level converter is the most efficient way to get power from the battery to ... » read more

IC Security Threats Spike With Quantum, AI, And Automotive


Key Takeaways: The top challenge for the chip architect is building post‑quantum cryptography securely into real hardware from the start, not just selecting approved algorithms. Security must be treated as a core silicon architecture decision early on, especially for long‑lived, automotive, and multi‑vendor systems. Automotive cybersecurity now requires a holistic approach span... » read more

Power, Not Area: Why Edge GPU Design Is Entering A New Era


For decades, semiconductor progress followed a familiar playbook: shrink the node, pack in more logic, raise the clock, and performance would follow. That model held remarkably well, and possibly much longer than it should have. As the industry moves below 2nm, GPU design is running into a hard physical reality. The limiting factor is no longer how much logic we can fit on a die. It’s how ... » read more

Limiting AI/ML Tools To Ensure Physical AI Safety, Security


Key Takeaways: AI-based tools can help monitor physical AI systems and LLMs, but human oversight is still needed to avoid false positives, bias, and other anomalies. For autonomous vehicles and robots, edge case scenarios and understanding human values are weak points, especially as moral and social values change over time. AI tools are growing and becoming increasingly helpful for c... » read more

Blog Review: Mar. 4


Cadence's Subash Peddu digs into the challenge of balancing performance, power efficiency, SoC layout optimization, and futureproofing when defining SoCs and memory subsystems for tomorrow’s AI accelerators. Siemens' Nicolae Tusinschi suggests that formal verification isn't just about finding bugs, and the ability to achieve mathematical certainty can fundamentally change how hardware desi... » read more

Blog Review: Feb. 25


Cadence's Mick Posner introduces the Foundational Chiplet System Architecture, a specification that aims to deliver a vendor and CPU-neutral architecture, common system partition guidelines, and a shared vocabulary and set of standards for system-level and interface definitions between chiplets. Synopsys' Scott Knowlton explains why LPDDR6 represents a big step forward in memory management c... » read more

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