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Hybrid Bonding Moves Into The Fast Lane


The industry’s unquenchable thirst for I/O density and faster connections between chips, particularly logic and cache memory, is transforming system designs to include 3D architectures, and hybrid bonding has become an essential component in that equation. Hybrid bonding involves die-to-wafer or wafer-to-wafer connection of copper pads that carry power and signals and the surrounding diele... » read more

Week In Review: Design, Low Power


Tools, IP, design Infineon Technologies acquired NoBug, a provider of design verification services. The acquisition will help Infineon expand its IoT R&D business in eastern Europe. “This considerable increase in superior verification know-how lets Infineon offer its customers more of its leading products at a reduced time-to-market,” said Guenter Krasser, Vice President and Managing D... » read more

Week In Review: Manufacturing, Test


Node scaling wars are revving up, although much of the action is happening where most people can't see it — inside of research labs. This is difficult stuff, which makes delivery dates difficult to pinpoint, and no one wants to give away their competitive position or commit to a timeline they can't keep. Billions of dollars of leading-edge research — funded by pure-play foundry TSMC, IDM... » read more

Week in Review: Manufacturing, Test


Hybrid Bonding & Supercomputers At this week’s ECTC conference, CEA-Leti and Intel presented an “optimized hybrid direct-bonding, self-assembly process," which they claim has the potential to increase alignment accuracy and speed up fab throughput by several thousand dies per hour. The approach uses capillary forces of a water droplet to align dies on a target wafer. “Commercial s... » read more

Week In Review: Manufacturing, Test


The U.S. Senate approved the 2022 America COMPETES act, which has big ramifications for the chip industry. The bill now heads to the House for further reconciliation. If approved, it would provide more than $50 billion in U.S. subsidies for semiconductor chip manufacturing. The SIAC (Semiconductor In America Coalition) urged Congress to act promptly to achieve a bipartisan compromise soon and o... » read more

Research Bits: March 29


Brain-like AI chip Researchers from Purdue University, Santa Clara University, Portland State University, Pennsylvania State University, Argonne National Laboratory, University of Illinois Chicago, Brookhaven National Laboratory, and University of Georgia built a reprogrammable chip that could be used as the basis for brain-like AI hardware. “The brains of living beings can continuously l... » read more

Week In Review: Design, Low Power


Design services firm SemiFive acquired Analog Bits, a provider of low-power mixed-signal IP. Analog Bits' portfolio includes precision clocking macros, I/Os, SerDes, and sensors to monitor PVT. It was founded in 1995 and based in Sunnyvale, California. “Analog Bits has a solid track record of developing and delivering differentiated and high-quality mixed signal IP addressing multiple market ... » read more

Week In Review: Design, Low Power


Alphawave IP will acquire the OpenFive business unit from SiFive. The $210 million cash deal will bring OpenFive’s high-speed connectivity SoC IP portfolio to Alphawave and nearly double its IPs currently available, including an expanded die-to-die connectivity portfolio as well as adding data center and networking custom silicon solutions. "When we completed our IPO in 2021, we committed to ... » read more

Survey: 2022 Deep Learning Applications


The 2022 member list of deep learning projects and products that eBeam members are working on in photomask to wafer semiconductor manufacturing. Participating companies include Advantest, ASML, Canon, CEA-LETI, D2S, Fraunhofer IPMS, Hitachi High-Tech Corporation, imec, NuFlare Technology, Siemens Industries Software, Inc.; Siemens EDA, STMicroelectronics, and TASMIT. Click here to see the su... » read more

Next-Gen 3D Chip/Packaging Race Begins


The first wave of chips is hitting the market using a technology called hybrid bonding, setting the stage for a new and competitive era of 3D-based chip products and advanced packages. AMD is the first vendor to unveil chips using copper hybrid bonding, an advanced die-stacking technology that enables next-generation 3D-like devices and packages. Hybrid bonding stacks and connects chips usin... » read more

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