tag: CEA-Leti

Chip Industry Week In Review
By The SE Staff - 29 Nov, 2024 - Comments: 0

Intel CEO Pat Gelsinger retired on Dec. 1, according to the company. He will be replaced by two interim co-CEOs, David Zinsner, who also continues to serve as CFO  and Michelle Johnston Holthaus, who has been named CEO of Intel Products. In addition, Frank Yeary was named interim executive chairman. Intel has been under pressure investors as non-traditional rivals, including Arm and NVIDIA, co... » read more

Chip Industry Technical Paper Roundup: Nov. 5
By Linda Christensen - 05 Nov, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=378 /]   Further Reading Chip Industry Week In Review Silicon Valley design center and NY EUV Accelerator; Siemens’ big acquisition; Onto extends panel inspection with two acquisitions; DENSO-Quadric deal; thinner Si-based power wafer; $100M funding for AI; trade wars escalate; earnings rep... » read more

EMEA Investments Driving Technology Specialization
By Liz Allan - 04 Nov, 2024 - Comments: 0

Government programs across Europe and the UK are seeing a surge of investments in leading edge technology, materials, and packaging. Industry and academia are coalescing around specialty areas, drawing on established relationships to foster innovation and fill gaps in regional supply chains while also maintaining international bonds. Government initiatives also are picking up in Israel, Saudi A... » read more

2D Semiconductors Make Progress, But So Does Silicon
By Katherine Derbyshire - 30 Oct, 2024 - Comments: 1

Semiconductor industry researchers have been anticipating the need for better transistor channel materials to replace silicon for a long time, but silicon devices have continued to improve enough to postpone that change. Silicon continues to provide an unmatched combination of device performance, manufacturability, and cost effectiveness. In recent years, though, the “end of silicon” cha... » read more

PCM-Based Photonic Memory Cells: Design-Space Exploration And Performance Comparisons
By Technical Paper Link - 29 Oct, 2024 - Comments: 0

A technical paper titled "Programmable phase change materials and silicon photonics co-integration for photonic memory applications: a systematic study" was published by researchers at Colorado State University, CEA-LETI, and UC Berkeley. Find the technical paper here. August 2024. "We delve into the performance comparison of PCM-based programmable photonic memory cells based on silicon p... » read more

Hybrid Bonding Makes Strides Toward Manufacturability
By Laura Peters - 28 Oct, 2024 - Comments: 0

Hybrid bonding is gaining traction in advanced packaging because it offers the shortest vertical connection between dies of similar or different functionalities, as well as better thermal, electrical and reliability results. Advantages include interconnect scaling to submicron pitches, high bandwidth, enhanced power efficiency, and better scaling relative to solder ball connections. But whil... » read more

Chip Industry Week In Review
By The SE Staff - 18 Oct, 2024 - Comments: 0

Arm joined forces with Korea's Samsung Foundry, ADTechnology, and Rebellions to create a CPU chiplet platform for AI training and inference. The new chiplet will be based on Samsung's 2nm gate-all-around technology. Intel and AMD, arch competitors for decades, formed an x86 ecosystem advisory group to collaborate on architectural interoperability and simplify software development. Samsung... » read more

Research Bits: Oct. 14
By Liz Allan - 14 Oct, 2024 - Comments: 0

Si-photonics chip emits beam of light MIT researchers developed a miniature, chip-based “tractor beam” that could help scientists study DNA, classify cells, and investigate the mechanisms of disease. The device uses a beam of light emitted by a silicon-photonics chip to manipulate particles millimeters away from the chip surface, while the sample remains sterile under its glass cover. T... » read more

Optimizing Wafer Edge Processes For Chip Stacking
By Laura Peters - 23 Sep, 2024 - Comments: 0

Stacking chiplets vertically using short and direct wafer-to-wafer bonds can reduce signal delay to negligible levels, enabling smaller, thinner packages with faster memory/processor speeds and lower power consumption. The race is on to implement wafer stacking and die-to-wafer hybrid bonding, now considered essential for stacking logic and memory, 3D NAND, and possibly multi-layer DRAM stac... » read more

Steps to Fabricate Nanotips Overhanging From Chip Edge By a Few Micrometers (CNRS, CEA-Leti)
By Technical Paper Link - 10 Sep, 2024 - Comments: 0

A new technical paper titled "Suspended tip overhanging from chip edge for atomic force microscopy with an optomechanical resonator" was published by researchers at Lab. d'Analyse et d'Architecture des Systèmes du CNRS and CEA-LETI. Abstract Raising the mechanical frequency of atomic force microscopy (AFM) probes to increase the measurement bandwidth has been a long-standing expectation in... » read more

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