tag: ASE

In-Memory Vs. Near-Memory Computing
By Mark LaPedus - 21 Feb, 2019 - Comments: 0

New memory-centric chip technologies are emerging that promise to solve the bandwidth bottleneck issues in today’s systems. The idea behind these technologies is to bring the memory closer to the processing tasks to speed up the system. This concept isn’t new and the previous versions of the technology fell short. Moreover, it’s unclear if the new approaches will live up to their billi... » read more

Lithography Challenges For Fan-out
By Mark LaPedus - 12 Feb, 2019 - Comments: 2

Higher density fan-out packages are moving toward more complex structures with finer routing layers, all of which requires more capable lithography equipment and other tools. The latest high-density fan-out packages are migrating toward the 1µm line/space barrier and beyond, which is considered a milestone in the industry. At these critical dimensions (CDs), fan-outs will provide better per... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 08 Feb, 2019 - Comments: 0

Chipmakers and OEMs Diamond semiconductor IP vendor AKHAN Semiconductor is cooperating with a U.S. federal investigation into alleged theft of its intellectual property by China’s Huawei. When AKHAN agreed to send its proprietary technology to Huawei pursuant to an agreement, AKHAN “believes that Huawei destroyed our product, shipped it to China without authorization, subjected it to tests... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 01 Feb, 2019 - Comments: 0

Chipmakers and OEMs Taiwan specialty foundry vendor Vanguard International Semiconductor (VIS) will acquire GlobalFoundries’ Fab 3E facility in Singapore for $236 million. Fab 3E manages a monthly capacity of approximately 35,000 200mm wafers. The transaction includes buildings, facilities, and equipment, as well as IP associated with GF’s MEMS business. VIS currently has three 200mm fa... » read more

More 2.5D/3D, Fan-Out Packages Ahead
By Mark LaPedus - 15 Jan, 2019 - Comments: 0

A new wave of 2.5D/3D, fan-out and other advanced IC packages is expected to flood the market over the next year. The new packages are targeted to address many of the same and challenging applications in the market, such as multi-die integration, memory bandwidth issues and even chip scaling. But the new, advanced IC packages face some technical challenges. And cost remains an issue as advan... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 11 Jan, 2019 - Comments: 0

Trade and fab equipment The SEMI Industry Strategy Symposium (ISS) this week opened with the theme “Golden Age of Semiconductor: Enabling the Next Industrial Revolution.” The annual three-day conference gave the year’s first outlook of the global electronics manufacturing industry. Click here for a recap. SEMI and Imec are joining forces to drive innovation and deepen industry align... » read more

Reducing Advanced Packaging Costs
By Ed Sperling - 09 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down with Chenglin Liu, director of package engineering at Marvell; John Hunt, senior director of engineering at ASE; Eric Tosaya, senior director of package manufacturing at eSilicon; and Juan Rey, vice president of engineering for Calibre at Mentor, a Siemens Business. What follows are excerpts of that discussion, which was held in front of a live audience at MEP... » read more

Packaging Biz Faces Challenges in 2019
By Mark LaPedus - 10 Dec, 2018 - Comments: 0

The IC packaging industry is bracing for slower growth, if not uncertainty, in 2019, even though advanced packaging remains a bright spot in the market. Generally, IC packaging houses saw strong demand in the first part of 2018, but the market cooled in the second half of the year due to a slowdown in memory. Going forward, the slower IC packaging market is expected to extend into the first ... » read more

Where Advanced Packaging Makes Sense
By Ed Sperling - 10 Dec, 2018 - Comments: 0

Semiconductor Engineering sat down with Chenglin Liu, director of package engineering at Marvell; John Hunt, senior director of engineering at ASE; Eric Tosaya, senior director of package manufacturing at eSilicon; and Juan Rey, vice president of engineering for Calibre at Mentor, a Siemens Business. What follows are excerpts of that discussion, which was held in front of a live audience at MEP... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 30 Nov, 2018 - Comments: 0

Chipmakers GlobalFoundries has announced that its advanced silicon-germanium (SiGe) offering is available for prototyping on 300mm wafers. GF’s SiGe technology has been shipping on its 200mm production line in Burlington, Vt. The technology, a 90nm SiGe process, is moving to 300mm wafers at GF’s Fab 10 facility in East Fishkill, N.Y. The SiGe technology is called 9HP. “The increasing ... » read more

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