Plasma Etching : Challenges And Options Going Forward (UMD, IBM, Lam Research, Intel, Samsung et al.)


A new technical paper titled "Future of plasma etching for microelectronics: Challenges and opportunities" was published by researchers from numerous academic institutions and companies, including University of Maryland, IBM, Arkema, UCLA, Lam Research, Intel Corporation, Samsung, Air Liquide, Sony, and many others. Abstract: "Plasma etching is an essential semiconductor manufacturing techn... » read more

Chip Industry Technical Paper Roundup: Mar. 5


New technical papers added to Semiconductor Engineering’s library this week. [table id=201 /] » read more

Chip Industry Technical Paper Roundup: Feb. 13


New technical papers added to Semiconductor Engineering’s library this week. [table id=197 /] More ReadingTechnical Paper Library home » read more

Heterogeneous Integration And Electronics Packaging Manufacturing Roadmap (SEMI & UCLA)


A report titled “Manufacturing Roadmap for Heterogeneous Integration and Electronics Packaging (MRHIEP)” was published by researchers at SEMI and the University of California Los Angeles (UCLA)'s Center for Heterogeneous Integration and Performance Scaling (CHIPS), and funded by the National Institute of Standards and Technology (NIST). MRHIEP Goals: "The goal of MRHIEP is to develop an o... » read more

Chip Industry Week In Review


By Jesse Allen, Linda Christensen, and Liz Allan.  The Biden administration plans to invest more than $5B  for semiconductor R&D and workforce support, including in the National Semiconductor Technology Center (NSTC), as part of the rollout of the CHIPS Act. Today's announcement included at least hundreds of millions for the NSTC workforce efforts, including creating a Workforce Cente... » read more

Chip Industry’s Technical Paper Roundup: Dec 11


New technical papers added to Semiconductor Engineering’s library this week. [table id=174 /] More ReadingTechnical Paper Library home » read more

Research Bits: December 5


Neuromorphic nanowires Researchers from UCLA and University of Sydney built an experimental computing system physically modeled after the biological brain. The device is composed of a tangled-up network of wires containing silver and selenium that were allowed to self-organize into a network of entangled nanowires on top of an array of 16 electrodes. The nanowire network physically reconfigure... » read more

Technical Paper Roundup: November 21


New technical papers recently added to Semiconductor Engineering’s library: [table id=167 /] More Reading Technical Paper Library home » read more

Neuromorphic Devices Based On Memristive Nanowire Networks


A technical paper titled “Online dynamical learning and sequence memory with neuromorphic nanowire networks” was published by researchers at University of Sydney, University of California Los Angeles (UCLA), National Institute for Materials Science (NIMS), Kyushu Institute of Technology (Kyutech), and University of Sydney Nano Institute. Abstract: "Nanowire Networks (NWNs) belong to an em... » read more

Research Bits: November 14


Solid-state thermal transistor for heat management Researchers from University of California Los Angeles created a stable and fully solid-state thermal transistor that uses an electric field to control a semiconductor device’s heat movement. It is compatible with integrated circuits in semiconductor manufacturing processes. The team’s design incorporates the field effect on charge dynamics... » read more

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