tag: Teradyne

Delivering On Power During HPC Test
By Anne Meixner - 09 Jul, 2024 - Comments: 0

The industry’s insatiable need for power in high-performance computing (HPC) is creating problems for test cells, which need to deliver very high currents at very consistent voltage levels through the power delivery network (PDN). In response, ATE, wafer probe, and contactor vendors are introducing some innovative approaches and test procedures that can ensure robust power delivery to ATE pro... » read more

X-ray Inspection Becoming Essential In Advanced Packaging
By Gregory Haley - 09 Jul, 2024 - Comments: 0

X-ray technology is moving into the mainstream of chip manufacturing as complex assemblies and advanced packaging make it increasingly difficult to ensure these devices will work as expected throughout their lifecycles. A single defect in a chiplet or interconnect can transform a complex advanced package into expensive scrap, and the risk only increases as the chip industry shifts from homog... » read more

What’s Missing In Test
By Anne Meixner - 19 Jun, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss how functional test content is brought up at first silicon, and the balance between ATE and system-level testing, with Klaus-Dieter Hilliges, V93000 platform extension manager at Advantest Europe; Robert Cavagnaro, fellow in the Design Engineering Group at Intel (responsible for manufacturing and test strategy of data center... » read more

Power-Aware Revolution In Automated Test For ICs
By Gregory Haley - 11 Jun, 2024 - Comments: 0

As semiconductor devices advance in complexity and sensitivity to power fluctuations, the integration of power-aware automatic test pattern generation (ATPG) is becoming indispensable for yield and the overall functionality of a chip. Unlike traditional ATPG, which generates test patterns solely to ensure device functionality, power-aware ATPG takes it a step further by meticulously consider... » read more

Semiconductor Testing Unlocks Increasing Levels Of ADAS
By Fisher Zhang - 11 Jun, 2024 - Comments: 0

Today’s advanced driver assistance systems (ADAS) require unprecedented computing power – tasked with processing an incredible amount of data from sensors in real-time, making split-second decisions, and ensuring the safety and comfort of passengers. The challenge is fluid and, as vehicles ascend from one level of autonomous driving to the next, computational demands will rise exponentially... » read more

Making Adaptive Test Work Better
By Ed Sperling - 10 Jun, 2024 - Comments: 0

One of the big challenges for IC test is making sense of mountains of data, a direct result of more features being packed onto a single die, or multiple chiplets being assembled into an advanced package. Collecting all that data through various agents and building models on the tester no longer makes sense for a couple reasons — there is too much data, and there are multiple customers using t... » read more

Chip Industry Week In Review
By The SE Staff - 24 May, 2024 - Comments: 0

Absolics, an affiliate of Korea materials company SKC, will receive up to $75 million in direct funding under the U.S. CHIPS Act for the construction of a 120,000 square-foot facility in Covington, Georgia, for glass substrates in advanced packaging. imec will host a €2.5 billion (~$2.72B) pilot line for researching chips beyond 2nm, partially funded through the EU Chips Act. imec CEO Luc ... » read more

Veterans Could Close The Semi Industry’s Workforce Gap
By Liz Allan - 22 May, 2024 - Comments: 0

Veterans are beginning to form a valuable talent pool for advanced manufacturing and chip-sector positions, helping to fill the current and projected future gap in qualified workers as new fabs come online, and adding discipline and skills that are difficult to find otherwise. The job opportunities are many, and so are the possible job paths. In some cases, veterans are looking to make a qui... » read more

The Future Of Fault Coverage In Chips
By Gregory Haley - 14 May, 2024 - Comments: 0

Heterogeneous integration and sophisticated packaging are making chips more difficult to test, necessitating more versatile and efficient testing methods to minimize the time and cost it takes for each test insertion. In the past, test costs typically were limited to about 2% of the total cost of a chip. That cost has been rising in recent years, and with chiplets, advanced packaging, and mo... » read more

Battery Management Testing: Alleviating EV Buyer Anxiety
By Thomas Koehler - 14 May, 2024 - Comments: 0

As the electric vehicle (EV) market surges towards 2040, fueled by strong consumer enthusiasm, the need to address key concerns about EV range, reliability, and battery life has become critical. Anxiety over potential range limitations, amplified by fears of scarce charging options, alongside safety worries due to media-reported battery incidents, have slowed adoption rates. Here, the semicondu... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy