tag: Teradyne

Testing At The Speed Of Light: Enabling Scalable Optical Testing For Silicon Photonics And CPO
By Matthew Griffin - 10 Jul, 2025 - Comments: 0

Today, a single ChatGPT query consumes roughly ten times more power than a traditional Google search and will only continue to grow as AI extends to image and video generation. With this growth not only in AI, but also in cloud computing and high-performance computing (HPC), data center electricity consumption is projected to account for up to 9.1% of total U.S. electricity use by 2030. ... » read more

Easing The Stress For Package-Level Burn-In
By Laura Peters - 10 Jul, 2025 - Comments: 0

Considered something of a necessary evil, burn-in of IC packages during production weeds out latent defects so they don’t turn into failures in the field. But as AI and multi-chiplet packages become more common, and concerns about aging circuitry heighten, shifting stress testing to the wafer level looks increasingly attractive from a quality, throughput, and cost standpoint. The shift is ... » read more

Detecting Slips, Scratches, And Cracks In Wafers Becoming Harder
By Anne Meixner - 10 Jul, 2025 - Comments: 0

Defect detection requirements on the order of 10 defective parts per million (DPPM) are driving improvements in inspection tools’ resolution and throughput at foundries and OSATs. However, defects that manifest as slips, scratches, and micro-cracks continue to bedevil the prevalent optical inspection methods. These defects can range in size from nanometers to millimeters, some of which are... » read more

Challenges In Using Sub-7nm ICs In Automotive
By Laura Peters - 10 Jun, 2025 - Comments: 0

The automotive industry is producing vehicles with increasing levels of real-time decision-making, enabled by thousands of ICs, sensors, and multi-chip packages, but making sure these systems work flawlessly throughout their expected lifetimes is a growing challenge. Automotive chips traditionally were developed at mature process nodes in five- to seven-year cycles, but much has changed over... » read more

Rethinking Chip Reliability For Harsh Conditions
By Gregory Haley - 10 Jun, 2025 - Comments: 0

As semiconductors push into environments once considered untenable, reliability expectations are being redefined. From the vacuum of space and the inside of jet engines to deep industrial automation and electrified drivetrains, chips now must endure extreme temperature swings, corrosive atmospheres, mechanical vibration, radiation, and unpredictable power cycles, all while delivering increasing... » read more

Identifying Sources Of Silent Data Corruption
By Laura Peters - 08 May, 2025 - Comments: 0

Silent data errors are raising concerns in large data centers, where they can propagate through systems and wreak havoc on long-duration programs like AI training runs. SDEs, also called silent data corruption, are technically rare. But with many thousands of servers, which contain millions of processors running at high utilization rates, these damaging events become common in large fleets. ... » read more

Chip Complexity Drives Innovation In Automated Test Equipment
By Jeorge Hurtarte - 08 May, 2025 - Comments: 0

Innovations in semiconductor technology—such as advancements in AI high-performance computing (HPC), Angstrom-scale silicon process nodes, silicon photonics, and automotive xEV wideband gap power transistor applications—require automated test equipment (ATE) to evolve at an unprecedented rate. As chip complexity grows, the challenges in design, manufacturing, and test multiply. It is a comp... » read more

Hunting For Macro Defects
By Anne Meixner - 08 Apr, 2025 - Comments: 0

Detecting macro-defects early in the wafer processing flow is vital for yield and process improvement, and it is driving innovations in both inspection techniques and wafer test map analysis. At the wafer level, a macro-defect can affect more than one die, and in some cases large regions of a wafer. Finding macro defects can indicate a significant issue with a process module, a particular fi... » read more

Chip Industry Week In Review
By The SE Staff - 04 Apr, 2025 - Comments: 0

Check out our new Inside Chips podcast. President Trump’s ‘Liberation Day’ tariffs were announced this week. The executive order stated that semiconductors and copper imports are not directly subject to the reciprocal tariff, although the exemption may be short-lived. Semiconductor equipment and tools were not mentioned, leaving the industry searching for clarification. Regardless, hig... » read more

Need For KGD Drives Singulated Die Screening
By Anne Meixner - 31 Mar, 2025 - Comments: 1

The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly higher than with a single die. Better methods for inspecting and testing these devices are already starting to roll out. High-throughput infrared inspection is capable of catching more sub-surface d... » read more

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