Detecting Slips, Scratches, Cracks In Wafers And Dies Becoming Harder

Defect detection requirements on the order of 10 defective parts per million (DPPM) are driving improvements in inspection tools’ resolution and throughput at foundries and OSATs. However, defects that manifest as slips, scratches, and micro-cracks continue to bedevil the prevalent optical inspection methods.

These defects can range in size from nanometers to millimeters, some of which are too small for visible wavelengths. And while X-ray and infrared are successful at detecting these narrow defects due to their shorter wavelengths, these approaches are slower. The same is true for wafer map analysis, which may take weeks or months to identify scratches.

Slips are difficult yet important to find because they can result in wafer breakage as well as failing die. Depending upon a fab’s inspection budget, a scratched wafer may not be found until wafer-level test. Similarly, an OSAT’s limited inspection budget may allow die with micro-level cracks to be assembled, which eventually can fail at package-level test, or months later in an end-customer’s system.

Early detection helps mitigate the source of defects, as well as scrapping of the affected wafer/die, which further reduces manufacturing costs. Problems that go undetected can impact downstream process steps, or worst case, show up in the field. The inspection strategy used comes down to balancing cost-of-ownership and the risk of escapes. But with the rising demand for known-good-die, as well as increasing cost pressures, factory teams now face tough choices on which inspection tools to use and how much time to allot for inspection.

Slips and scratches
Crystalline dislocations (a.k.a. slips) and scratches impact the subsequent wafer fabrication steps that require planarity at the microscopic and near-atomic level. If sufficiently large, optical imaging methods can detect them. X-ray diffraction imaging has greater success with smaller dislocations. However, this method requires more time, making it better suited for low sampling rate. Likewise, wafer test map analysis to identify scratches occurs much later in the manufacturing flow, making it ineffective for addressing any significant excursion.

Crystalline dislocations occur during ingot growth or wafer handling. Represented as slips in the crystal lattice, these vertical defects can be difficult to detect. A defect may start as small as a nick in a wafer edge or a slip in the crystalline structure. Then, due to the subsequent thermal fluctuations, these defects can increase in length and depth.

Weeks later, a slip defect can result in wafer breakage or another process anomaly. Visible wavelengths struggle to detect slips. X-rays can more easily detect them because the slips create an air gap, which diffracts differently than the silicon or compound semiconductor material.

Fig. 1: Illustrating the differences between optical (left) and X-ray diffraction (right) images. The effect and extent of the crystal defects is more pronounced in the X-ray image. Source: Bruker

“With X-ray diffraction we can detect defects like slips that extend centimeters in from the edge of the wafer,” said John Wall, compound semiconductor business product manager at Bruker. “Dislocation defects are often caused by impact damage to the wafer. Though these can occur anywhere on the wafer, they mostly occur near the edge where the handling takes place. Then, during thermal processes, these dislocations spread away from the initial defect. This results in a surface disruption for the length of the dislocation. Obviously, this affects lithography and patterning because the wafer is no longer planar.”

Finding scratches
Fab personnel or equipment can cause wafer scratches. The former occurs when someone removes a wafer from a boat with a wafer wand. The resulting scratches can be long or short, and they occur in random places, manifesting as irregular squiggly shapes. In contrast, equipment typically creates scratches that are straight lines or arcs, and they appear in the same area.

Fig. 2: Scratch on a 200mm semiconductor wafer that was made by a human. Source: Microtronic

Fig. 3: Scratch made by a robot wafer handler that curves across the whole wafer (300 mm). Source: Microtronic

Finding scratches with automatic optical imaging (AOI) techniques presents a few challenges.

“Traditional defect detection methods often use image subtraction to identify differences or anomalies between scans. However, this approach struggles with low-contrast defects, which are harder to detect,” said Woo Young Han, fellow at Onto Innovation. “Defects such as small scratches or irregularities in the wafer may have minimal contrast with the background, making them challenging to identify.”

Increasing wafer inspection rates and inserting optical inspection between more process steps help overcome these challenges.

“The primary factor for optical scratch detection is the illumination used to maximize the contrast of the defect relative to its surroundings,” said Errol Akomer, applications director at Microtronic. “Current process step scratches are best detected with more of a darkfield (off-axis) component, while previous process step scratches require more brightfield (on-axis) illumination. In our experience with macro inspection, it is best to perform a 100% inspection as often as possible between process steps. A combination of on/off-axis illumination can be used to detect scratch defects at the current or previous process step. If scratches are detected at the current step, fabs can minimize excursions and rework the affected material. If the scratches are detected from a previous step, we recommend guard-banding around the defective die and digitally inking-out the scratched die and their neighbors as ‘fails.’ This minimizes both test escapes and reliability failures in a customer system.”

Wafer test map analysis provides engineering teams with another opportunity to find scratches. Each die represents a pixel with pass/fail as different “colors.” The more die per wafer, the easier detection becomes. Consider 90 dies versus 2,446 dies on a 300mm wafer. In the former, a scratch of 150mm could include 6 die, while in the latter it would be 53 die.

Fig. 4: Difference in number of die impacted by the same scratch with different number of die per wafer. Source: Silicon Edge

Over the past 10-plus years, engineers have increased their usage of ML-based algorithms to analyze wafer test maps. These methods need to analyze a wide variety of wafer map images. Detection of scratches from a wafer map analysis is a challenge because these can easily be identified as other defect types.

“We do the analysis in two stages,” explained Jin Yu, head of machine learning at Teradyne. “First, we classify wafers into four categories. After that classification, we can classify into smaller categories, e.g., center, edge, different types of scratches. A scratch could be across the whole wafer, or it might be tiny in a localized area. This is why we build a tree-like structure for classification. The reason we started to identify the four big classes and then to do the sub-classes is we saw some crossovers between edge-local and scratches, as well as local and center.”

Fig. 5: Real-time wafer map analysis to categorize defects using advanced machine learning algorithms. Source: Teradyne

Chips and cracks
Die singulation and wafer/die handling can create chips and cracks. Defect sizes range from millimeters to microns. The rising and falling temperatures from subsequent process steps and system usage result in defect expansion. This can lead to time-zero failures or eventually in-field failures.

Defect creation and detection can be weeks or even months apart. To minimize that delay, engineering teams are adding more inspection steps and increasing sampling rates to as high as 100%. They are also adopting new tooling. Recent improvements in imaging techniques enable higher resolution and faster throughput.

“A big improvement is to have high-resolution images for every wafer at many steps throughout the production process. This allows users to review wafer images at various points in-line to determine a possible root cause for yield loss, or to bracket a loop in the manufacturing line,” said Reiner Fenske, CEO of Microtronic. “For example, a chipped wafer may break in a thermal process but show signs of edge damage at earlier steps.”

Fig. 6: Chipped wafer found during imaging. Source: Microtonic

Post-singulation die cracks
Until the past decade, assembly factories did not need to be as sensitive to thin defects as fabs. But the incessant demand for the lowest DPPM, driven by high-performance mobile and automotive devices, has necessitated finding smaller and smaller defects during the assembly process. Optical inspection methods continue to be the standard post-singulation step at an OSAT. But it’s now a risk to let a 5µm or 1µm crack escape detection.

After die singulation, inspection occurs on a die’s six sides — top, bottom, and edges. Dicing wafer into dies can create die-level cracks along the sidewalls (i.e. edges). Also, this step can accentuate sub-surface cracks introduced during wafer production. Cracks manifest in horizontal or vertical directions.

Optical imaging has been the prevalent wavelength for crack detection. But there are advantages to shorter wavelengths, i.e. X-ray and infrared, in detecting smaller cracks (>= 10 microns) and cracks beneath the surface. Until recently, infrared imaging methods could only support sampling. Advancements in instrumentation and automation now support higher throughput times (e.g., 50,000 units per hour), which enable OSATs to inspect all die with infrared tools.

“For a standard defect, ~100 micron, customers use a six-sided optical inspection. More and more we have customers demanding detection of micro-scale defects, ~10 micron crack size, said Pierre-Alexandre Jay, product marketing manager for inspection and metrology at Cohu. “The difficulty with 10-micron crack size is the over rejection that occurs because the defects are at the same scale of the device roughness.”

Jay explained that infrared imaging can more easily detect defects of this size with lower over-rejection. In addition, these wavelengths can detect inner cracks, which optical fails to detect.

Fig. 7: Comparison of optical versus infrared detection capabilities for micro-cracks and inner cracks. Source: Cohu

While singulation primarily generates horizontal cracks, during wafer fabrication the various mechanical stresses can introduce vertical cracks and inner cracks. Depending upon wafer inspection strategy, these may escape detection. Thus, there is a growing need for screening these types of defects during the assembly process, especially for automotive and high-end mobile devices.

These vertical cracks measure in thickness from 10µm to 1µm, and in this range the detection capability using optical methods begins to fade. In comparing optical versus infrared imaging, the benefits of infrared are twofold. First, it can more easily detect defects of less than or equal to 5µm. Second, with advanced computer vision, the over-rejection can be reduced by an order of magnitude.

Fig. 8: Comparison of optical versus infrared detection capabilities for vertical microcracks. Source: Cohu

“With optical methods our tool can detect down to a 5µm crack. But infrared methods can easily detect it because it appears as black and white,” explained Cohu’s Jay. “At this wavelength it detects the diffraction due to the crack which is air instead of silicon.”

Conclusion
Wafer scratches, crystalline defects within wafers, and die-level cracks can be difficult to discern. But to meet the exacting standards of 10 DPPM escape rates, engineering teams need to make adept choices regarding inspection technique, inspection frequency, and wafer map analysis.

Those choices need to be made in consideration of the overall cost of goods sold (COGS). With device costs of $0.10, waiting until wafer-level test may be the appropriate choice. But with the increasing requirement for known good die driven across multiple industry sectors, every DPPM counts.

Continuous improvements in resolution and speed for visible light will allow it to continue playing a role in the detection of slips, scratches, and cracks. Yet infrared and X-ray imaging is seeing uptick in adoption because diffraction analysis reveals thin breaks in black-and-white.

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