China Speeds Up Advanced Chip Development


China is accelerating its efforts to advance its domestic semiconductor industry, amid ongoing trade tensions with the West, in hopes of becoming more self-sufficient. The country is still behind in IC technology and is nowhere close to being self-reliant, but it is making noticeable progress. Until recently, China’s domestic chipmakers were stuck with mature foundry processes with no pres... » read more

The Good And Bad Of Chiplets


The chiplet model continues to gain traction in the market, but there are still some challenges to enable broader support for the technology. AMD, Intel, TSMC, Marvell and a few others have developed or demonstrated devices using chiplets, which is an alternative way to develop an advanced design. Beyond that, however, the adoption of chiplets is limited in the industry due to ecosystem issu... » read more

Chip Design Is Getting Squishy


So many variables, uncertainties and new approaches are in play today across the chip industry today that previous rules are looking rather dated. In the past, a handful of large companies or organizations set the rules for the industry and established an industry roadmap. No such roadmap exists today. And while there are efforts underway to create new roadmaps for different industries, inte... » read more

Chiplet Momentum Rising


The chiplet model is gaining momentum as an alternative to developing monolithic ASIC designs, which are becoming more complex and expensive at each node. Several companies and industry groups are rallying around the chiplet model, including AMD, Intel and TSMC. In addition, there is a new U.S. Department of Defense (DoD) initiative. The goal is to speed up time to market and reduce the cost... » read more

Is This The Year Of The Chiplet?


Customizing chips by choosing pre-characterized — and most likely hardened IP — from a menu of options appears to be gaining ground. It's rare to go to a conference these days without hearing chiplets being mentioned. At a time when end markets are splintering and more designs are unique, chiplets are viewed as a way to rapidly build a device using exactly what is required for a particul... » read more

Moore’s Law, Supply Chains And Security


The debate about the future of Moore's Law continues, while other parts of the industry look for alternatives. In between, supply chains are being pulled in multiple directions, with safety and security often in the middle. All across the semiconductor industry, significant changes are underway. Some of these have been in the works for some time. Others are new or accelerating faster than an... » read more

Is There A Crossover Point For Mainstream Anymore?


Until 28nm, it was generally assumed that process nodes would go mainstream one or two generations after they were introduced. So by the time the leading edge chips for smartphones and servers were being developed at 16/14nm and 10/7nm, it was assumed that developing a chip at 28nm would be less expensive, less complex, and that the process rule deck would shrink. That worked for decades. Th... » read more

Planning For Panel-Level Fan-out


Several companies are developing or ramping up panel-level fan-out packaging as a way to reduce the cost of advanced packaging. Wafer-level fan-out is one of several advanced packaging types where a package can incorporate dies, MEMS and passives in an IC package. This approach has been in production for years, and is produced in a round wafer format in 200mm or 300mm wafer sizes. Fan-out... » read more

What’s The Best Advanced Packaging Option?


As traditional chip designs become more unwieldy and expensive at each node, many IC vendors are exploring or pursuing alternative approaches using advanced packaging. The problem is there are too many advanced packaging options on the table already, and the list continues to grow. Moreover, each option has several tradeoffs and challenges, and all of them are still relatively expensive. ... » read more

New Technologies To Support 3D-ICs


Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for the Semiconductor Business Unit of ANSYS; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Bus... » read more

← Older posts