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Residual Stress With EIGER2 R 500K


Many manufacturing processes leave residual stresses which can affect the performance of manufactured components. Compressive stress can be engineered into a metal coating to resist crack propagation, while tensile stress can be exploited to enhance conductivity in semiconductors. Strained materials exhibit changes in atomic spacing which can be detected by X-ray diffraction (XRD) and related t... » read more

FinFET Metrology Challenges Grow


Chipmakers face a multitude of challenges in the fab at 10nm/7nm and beyond, but one technology that is typically under the radar is becoming especially difficult—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems in devices and processes. It helps to ensure yields in both the lab and fab. At 28nm and above, metrology is a straightforward... » read more

Measuring FinFETs Will Get Harder


The industry is gradually migrating toward chips based on finFET transistors at 16nm/14nm and beyond, but manufacturing those finFETs is proving to be a daunting challenge in the fab. Patterning is the most difficult process for finFETs. But another process, metrology, is fast becoming one of the biggest challenges for the next-generation transistor technology. In fact, [getkc id="252" kc_n... » read more