ML-Assisted IC Test Binning With Real-Time Prediction At The Edge


IC Test is a critical part of semiconductor manufacturing and proper die binning and material disposition has an important impact on the overall yield and on the process monitoring and failure mode diagnostics. Edge analytics are becoming an increasingly important aspect of die disposition. By intercepting parts in real-time at the wafer test step, we can save downstream processing needs. In th... » read more

Elimination Of Die-Pop Defect By Vacuum Reflow For Ultrathin Die With Warpage In Semiconductor Packaging Assembly


Semiconductor die thickness is getting thinner over time due to improvement of power efficiency in advance power electronic packages. Ultrathin die with convex warpage can easily deteriorate the solder void removal process during solder reflow, leading to various packaging reliability issues. In particular, a new type of packaging defect phenomenon—die-pop—is observed. Vacuum reflow process... » read more

Managing Wafer Retest


Every wafer test touch-down requires a balance between a good electrical contact and preventing damage to the wafer and probe card. Done wrong, it can ruin a wafer and the customized probe card and result in poor yield, as well as failures in the field. Achieving this balance requires good wafer probing process procedures as well as monitoring of the resulting process parameters, much of it ... » read more

NIWeek Test Talk


Semiconductor Engineering sat down with David Hall, Chief Marketer, Semiconductor, of National Instruments, and Mike Watts, NI’s Senior Solutions Marketer, Semiconductor Test, during NIWeek 2018 in Austin, Texas. “One of the opportunities for National Instruments is that over the last 10 years, we’ve seen larger semiconductor organizations change the way they do testing both for R&... » read more