Step Towards 3D PICs: Low Loss Fiber-Coupled Interconnects (UIUC)


A new technical paper titled "Low loss fiber-coupled volumetric interconnects fabricated via direct laser writing" was published by researchers at University of Illinois Urbana-Champaign (UIUC). Abstract "Photonic integrated circuits (PICs) are vital for high-speed data transmission. However, optical routing is limited in PICs composed of only one or a few stacked planes. Further, coupling ... » read more

Chip Industry’s Technical Paper Roundup: Apr. 4


New technical papers recently added to Semiconductor Engineering’s library: [table id=90 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

CXL Memory: Detailed Characterization Analysis Using Micro-Benchmarks And Real Applications (UIUC, Intel Labs)


A new technical paper titled "Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices" was published by researchers at University of Illinois Urbana-Champaign (UIUC) and Intel Labs. Abstract: "The high demand for memory capacity in modern datacenters has led to multiple lines of innovation in memory expansion and disaggregation. One such effort is Compute eXpress Link (CXL)-based... » read more

Technical Paper Round-Up: Aug 23


New technical papers added to Semiconductor Engineering’s library this week. [table id=46 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Don’t Forget the I/O When Allocating Your Last-Level Cache


Source/Authors: Yifan Yuan (UIUC); Mohammad Alian (Kansas); Yipeng Wang, Ren Wang (Intel Labs); Ilia Kurakin (Intel); Charlie Tai (Intel Labs); Nam Sung Kim (UIUC) Find technical paper here. 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA.) "Abstract—In modern server CPUs, last-level cache (LLC) is a critical hardware resource that exerts significant... » read more