Chip Industry Week In Review

Big Deals and Fundings

• Rapidus secured US$1.7B in a new funding round from the Japanese government and the private sector to ramp 2nm production by next year.
• Open AI announced a $110B in new funding, with $30B from Nvidia, $30B from Softbank and $50B from Amazon.
• In a $100B multi-year deal, Meta will power its AI infrastructure with up to 6GW of AMD’s GPUs.
• SambaNova and Intel are teaming up on Xeon-based AI inference solutions.
• Also, SambaNova raised $350M in funding and announced its SN50 agentic AI chip, claiming 5X speed at 3X lower cost than GPUs.
• Axelera AI raised $250M for its AI accelerator aimed at edge and physical AI.
• MatX raised $500M for its LLM chip, based on a splittable systolic array, combining the low latency of SRAM-first designs with the long-context support of HBM.

Memory 

• Due to an ongoing memory chip supply shortage, IDC predicts the global smartphone sector will drop ~13% in 2026 and result in a 14% increase in average selling prices.
• SK hynix and Sandisk partnered to standardize high-bandwidth flash (HBF), featuring a new memory layer between HBM and SSD to secure scalability and power efficiency in AI inference infrastructure.
• In addition, SK hynix will invest approximately $15B in new facilities for its first semiconductor fab at the Yongin Semiconductor Cluster. The company moved up the first cleanroom opening to February 2027 to meet rising AI memory demand.
• JEDEC published UFS 5.0 and UFS Host Controller Interface 5.0 for mobile, auto, and computing systems.
• MIPI updated two of its specs, UniPro v3.0 and M-PHY v6.0 for UFS 5.0 for edge AI workloads.

SPIE’s Advanced Lithography and Patterning conference was held this week. Among the highlights:

• ASML will ratchet up its EUV power source from 600 watts to as high as 1 kW over the next few years, enabling it to process more than 300 wafers per hour by 2030, or roughly one-third more than today, according to industry sources.
• imec demonstrated an EUV dose reduction technique.
• IBM showed its sub-2nm node technology, including high-NA EUV manufacturing readiness, polarization control, and next-gen masks.
• Fujifilm presented new resists for high-NA EUV exposure, nanoimprint litho, and one that’s PFAS-free.
• EUV resist company Tokyo Ohka Kogyo (TOK) made a strategic investment in Irresistible Materials, which makes an EUV resist platform for low-NA and high-NA EUV.
• Find more SPIE technical presentations here.

People

• Kevin O’Buckley, SVP/GM of Intel Foundry Services, moved over to be Qualcomm’s new EVP of Global Operations and Supply Chain.
• UMC announced key executive leadership changes with Jason Wang named CEO and Ming Hsu appointed President/COO, strengthening its succession planning amid continued focus on specialty foundry technologies.

Financial releases: D-Wave, Keysight, Navitas, Nvidia, Photronics, Qnity, Synopsys, SkyWater, Valens.

Quick links to more news

Funding, Deals, Reports
New Technology
In-Depth
Research
Automotive
Security
Trending Video
Events and Further Reading

In-Depth

Semiconductor Engineering published its Systems and Design newsletter this week, featuring:

• Using Data And AI More Effectively In EDA
• AI Starting To Simplify Design Of Programmable Logic
• Verifying Scale-Up And Scale-Out In Data Centers

Plus:

• Special Report: BPD Creates Fab Tool, Thermal Dissipation Barriers
• Back-End Automation Tackles Growing Complexity
• Tech Talk: New Performance Requirements For Audio
• Opinion: Chiplets 2026: Where Are We Today

Fundings, Deals, Reports

Deals

• Baya Systems and Aion Silicon partnered to enable faster definition, design, and deployment of complex SoC and chiplet systems.
• Modus Test and yieldWerx will jointly deliver a closed-loop socket-to-silicon correlation solution.
• Cadence expanded its collaboration with NeoLogic for new energy efficient server processors.
• ProteanTecs will collaborate with Gubo Technologies to integrate embedded silicon monitoring data with cloud-based analytics.
• AMD and Nutanix will co-develop an open, full-stack AI infrastructure platform.
• ADTechnology and Fraunhofer will jointly develop SoC and chiplet solutions.
• Cadence completed its acquisition of Hexagon’s design and engineering business.
• Tower inked two partnership deals: one with Salience Labs to manufacture photonic IC-based optical circuit switches, and another with Xanadu on photonic quantum HW.

More Funding

• Circuit raised $30M for its AI manufacturing solution.
• Tattvam AI received $1.7M in funding for AI-driven chip design.
• IQM will soon become a public company, at a pre-money equity valuation of ~$1.8B.

Reports

• DRAM industry revenue climbed to $53B in Q4, up 29 % QoQ, with Samsung now top, followed by SK hynix and Micron (Trendforce).
• Global Smartphone Average DRAM Hits Record (Counterpoint)
• Compound semiconductors enter a new growth phase (Yole)
• Edge Computing Global Spending (IDC)

Opinions

• Inside Apple’s Push to Build an All-American Chip (WSJ)
• The 2028 Global Intelligence Crisis (Citrini Research)
• Looming Taiwan Chip Disaster That Silicon Valley Has Long Ignored (NYT)

Research

Imec released results of its DTCO study on performance boosters required to support aggressive area scaling of monolithic CFET device architectures for A7, A5 and A3 logic nodes.

Researchers at Georgia Tech published a technical survey on Monolithically Stackable 1T1C 3-D DRAM, providing a roadmap for scaling memory to hundreds of layers. This research outlines the physical scaling limits of traditional 2D DRAM by proposing a shift toward vertical, monolithic integration. 

Rice University and ASU researchers developed a new, scalable method for selective-area diamond growth, enabling enhanced thermal management on silicon and GaN substrates.

Penn State researchers developed synthetic DNA and integrated it with crystalline perovskite to boost the storage capacity of advanced materials for low-power next-gen memory.

In quantum, UCSB researchers discovered a more robust new qubit in silicon, named the ‘CN center’, made up of carbon and nitrogen atoms. And Niels Bohr Institute developed an adaptive Bayesian protocol for tracking qubit relaxation rates using an FPGA-based classical controller.

More research papers

• Noise Reduction in Silicon Interposer of HBM (SNU, MIT, SK hynix)
• HW-Driven Graph Preprocessing for Enhanced GNN Performance (KAIST et al.)
• WO_x Adhesion Layer for Low Resistance Hole Contacts to WSe2 (Berkeley)
• Oxide semiconductor gain cell-embedded memory (Hanyang U.)
• Junctionless Silicon Nanowire Transistors without the Use of Impurity Doping (NaMLab et al.)
• 3D atomic-scale metrology of strain relaxation and roughness in GAA transistors via electron ptychography (Cornell, ASM, TSMC)

New Technology

Fractilia announced its FAME 300 in-line stochastics metrology and control system has been adopted into full fab automation flow by a top-five semiconductor device maker, marking the first fully host-integrated in-line stochastics control deployment in an advanced node fab.

Cadence released Virtuoso Studio IC25.1, featuring an auto cluster assistant with added reliability degradation parameters, and more.

eBeam Initiative published its 2026 DL & LLM applications list for photomask-to-wafer semiconductor manufacturing, showing member deployments of deep learning and LLM-based techniques.

Kioxia began shipping evaluation samples of embedded flash memory compatible with UFS 5.0.

Broadcom launched its StrataDNX-NXT 3D-stacked switch silicon family. The company expects to sell at least 1 million 3D stacked chips by 2027 as demand for AI infrastructure accelerates, according to Reuters.

Keysight and Ericsson validated interoperability between an Ericsson pre-6G base station and prototype pre-6G devices using Keysight’s WaveJudge Wireless Analyzer.

Automotive

VirtIO, an open-source device virtualization technology for automotive applications, is gaining support from the chip industry and automakers, including AMD, Arm, Honda, and others. Panasonic Automotive Systems has been spearheading the industry-wide adoption of VirtIO, which allows common SW to run seamlessly on different HW platforms.

Fig. 1: VirtIO. Source: Panasonic Automotive Systems

The Automotive Edge Computing Consortium released a 52-page guide for adopting edge computing in the automotive sector, addressing key challenges, use cases, and detailed system requirements.

Fig. 2: General architecture of automotive edge computing. Source: AECC’s Industry Blueprint report

Autonomous

Arm and Tensor announced a multi-year strategic collaboration toward an agentic AI personal Robocar, leveraging Arm’s compute platform to distribute safety-capable intelligence across the vehicle and enabling a vertically integrated Level 4 autonomy stack.

Mapless features in new autonomous rollouts appear to be a growing trend.

• Helm.ai revealed a production-ready, vision-only SW stack that scales from advanced L2+ systems through L4 urban autonomy without HD maps or lidar sensors.
• With backing from Nvidia, Uber, and others, UK startup Wayve raised $1.5B in funding (with total funding at $8.6B) to drive scaled deployment of its L2+ to L4 autonomous car platform. The technology utilizes a single neural network, converting sensor data from cameras and radar, mapless autonomy (no HD maps), with adaptability to any vehicle.

Fig. 3: Single neural network trained on diverse data to convert raw sensor inputs into safe driving outputs. Source: Wayve

Auto tech

• NXP released PMD transceivers for deploying Ethernet to the network edge, aimed at SDVs and industrial uses.
• Toshiba rolled out 4 voltage-driven photorelays, with a maximum temp rating of of 135°C, which is suitable for automotive.
• MCNEX and Valens will jointly offer automotive-grade high-resolution cameras over unshielded cables/connectors, reducing the cost and complexity of wiring harnesses.

Vehicle research

• 3D Scene Rendering with Multimodal Gaussian Splatting (UCSD, Nvidia)
• Function consolidation for centralized SDV management systems (Boston)
• Bridging Modeling & Rust Development for SDVs (Ampere et al.)
• Toward Automated Virtual ECU Twins for Shift-Left Automotive SW Testing
• Survey on DL-Based LiDAR Super-Resolution for Autonomous Driving (UCL)
• GenAI Pipeline for SDV Test Artifact Generation & On-Vehicle Execution (Mercedes, Stuttgart U., TUM)

Security

MIT developed a new low-cost fingerprint fabrication method, enabling two chips to authenticate each other without storing secret key information on a third party server.

MIT’s Lincoln Lab published its first evaluation report on DARPA’s TRACTOR program, aimed at developing scalable, automated techniques for translating legacy C code bases into the memory-safe Rust programming language.

Using Claude code, AI strategist Sammy Azdoufal discovered there were no access control lists (ACL) in DJI’s autonomous vacuums, reportedly allowing him to gain access to all data (live camera feeds, microphones, maps) to nearly 7,000 DJI robots.

Crowdstrike’s 2026 Global Threat report included some notable stats:

• Cyberattacks from AI-enabled adversaries rose 89% in 2025
• 40% of China-nexus adversaries targeted edge devices
• eCrime breakout time was 29 minutes, a 65% increase in speed

New security products

• Caspia has launched its security verification product CODAx, an auditing tool that applies GenAI techniques to map HW security weaknesses to detectable RTL coding patterns systematically.
• SandGrain and X-Fab released a co-developed secure IoT/IIoT token for post-quantum protection.
• Akamai released a ‘HW-isolated agentless’ security solution.
• Anthropic’s new security tool, available on a limited basis, uses reasoning-based analysis to identify vulnerabilities and recommend patches across entire code bases to human reviewers. Meanwhile, the company is accusing DeepSeek, Moonshot, and MiniMax of illicitly using its Claude AI tool to improve their AI models, using a distillation tactic.

Newly published

• TFL: Targeted Bit-Flip Attack on LLM (ASU)
• Bitflip in SRAM cell memory induced by laser fault injection (U.Rennes)
• Red-Teaming Claude Opus and ChatGPT-based Security Advisors for TEEs
• Security Eval. of PQ ML-DSA Implementations Against SW-Induced Fault Attacks (RIT)
• TinyML Security: Attacks, Defenses & Challenges in Resource-Constrained ML
• Secure RISC-V Processor for High-Performance Cryptography with Power Side-Channel Protection (UT Dallas, RPI)
• Optimized Row Access Prefetching for Rowhammer-mitigated Memory (Texas A&M, Ahead Computing, Arm)

This week’s security alerts

• AMD issued a high-level security bulletin for guest-initiated machine check errors.
• Nvidia issued a high-level alert for Cumulus Linux and NVOS.
• CISA’s latest alerts and advisories are here, including an emergency directive to secure Cisco’s SD-WAN system.

Trending Video

Wi-Fi 7 Moves To The IoT: Sivaram Trikutam, SVP of Infineon’s wireless products, talks about what’s behind the widespread adoption of extremely high-throughput wireless.

Events and Further Reading

Upcoming webinars are here, including:

• Intelligent Networks: Power, Reliability, and Maintenance in Telecom, Mar. 3
• Cadence TECHTALK: Meet Your Virtual Engineer AI Wingman, Mar. 3
• Security Certifications: Navigating Standards, Requirements, and Market Expectations, Mar. 5

Find upcoming chip industry events here, including:

Semiconductor Engineering’s complete collection of newsletters for all five channels can be found here.