tag: Yole Group

Chip Industry Week In Review
By The SE Staff - 26 Jul, 2024 - Comments: 0

The U.S. Department of Commerce and Amkor Technology signed a deal to provide up to $400 million in funding, under the CHIPS and Science Act, to build a previously announced end-to-end advanced packaging plant. The combined funding is expected to total about $2 billion. The new facility will add some 2,000 jobs in Peoria, Arizona. The SK hynix Board approved its Yongin Semiconductor Cluster... » read more

Chip Industry Week In Review
By The SE Staff - 19 Jul, 2024 - Comments: 0

The University of Texas at Austin’s Texas Institute for Electronics (TIE) was awarded $840 million to establish a Department of Defense microelectronics manufacturing center. This center will focus on developing advanced semiconductor microsystems to enhance U.S. defense systems. The project is part of DARPA's NGMM Program. The U.S. Dept. of Commerce announced preliminary terms with Global... » read more

Chip Industry Week In Review
By The SE Staff - 28 Jun, 2024 - Comments: 0

The Design Automation Conference morphed into the Chips to Systems Conference, reflecting an industry shift from monolithic SoCs to assemblies of chiplets in various flavors of advanced packaging. The change drew a slew of students and a resurgent buzz, fueled by discussions about heterogeneous integration, reliability, and ways to leverage AI/ML to speed up design and verification processes. ... » read more

Running More Efficient AI/ML Code With Neuromorphic Engines
By Karen Heyman - 16 May, 2024 - Comments: 0

Neuromorphic engineering is finally getting closer to market reality, propelled by the AI/ML-driven need for low-power, high-performance solutions. Whether current initiatives result in true neuromorphic devices, or whether devices will be inspired by neuromorphic concepts, remains to be seen. But academic and industry researchers continue to experiment in the hopes of achieving significant ... » read more

Chip Industry Week In Review
By The SE Staff - 19 Apr, 2024 - Comments: 0

SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at t... » read more

Chip Industry Week In Review
By The SE Staff - 29 Mar, 2024 - Comments: 0

By Adam Kovac, Karen Heyman, and Liz Allan.  China introduced strict procurement guidelines aimed at blocking the use of AMD and Intel processors in government computers. Meanwhile, China urged the Netherlands to ease restrictions on deep ultraviolet (DUV) litho equipment, according to Nikkei Asia. DUV is an older technology, based on 193nm ArF lasers, but in conjunction with multi-p... » read more

Chip Industry Week In Review
By The SE Staff - 15 Mar, 2024 - Comments: 0

By Adam Kovac, Karen Heyman, and Liz Allan. Europe's semiconductor footprint is growing in areas that previously had little association with chips. Silicon Box plans to build a panel-level foundry in northern Italy, funded in part by the Italian government. The deal is worth around €3.2 billion ($3.6B). In addition, imec will establish a specialized 300mm chip technology pilot line in M... » read more

Chip Industry Week In Review
By The SE Staff - 09 Feb, 2024 - Comments: 0

By Jesse Allen, Linda Christensen, and Liz Allan.  The Biden administration plans to invest more than $5B  for semiconductor R&D and workforce support, including in the National Semiconductor Technology Center (NSTC), as part of the rollout of the CHIPS Act. Today's announcement included at least hundreds of millions for the NSTC workforce efforts, including creating a Workforce Cente... » read more

Fan-Out Panel-Level Packaging Hurdles
By Anne Meixner - 24 Jan, 2024 - Comments: 0

Fan-out panel-level packaging (FOPLP) promises to significantly lower assembly costs over fan-out wafer-level packaging, providing the relevant processes for die placement, molding and redistribution layers (RDLs) formation can be scaled up with equivalent yield. There is still much work to be done before that happens. Until now, FOPLP has been adopted for devices that are manufactured in ve... » read more

Chip Industry Week In Review
By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

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