Chiplet-Level HI of Polymer-Based Circuits For Fabricating Flexible Electronic-Photonic Integrated Devices


A technical paper titled "Flexible electronic-photonic 3D integration from ultrathin polymer chiplets" was published by researchers at Dartmouth College and Boston University. The paper states: "Here, we present a robust chiplet-level heterogeneous integration of polymer-based circuits (CHIP), where ultrathin polymer electronic and optoelectronic chiplets are vertically bonded at room tempe... » read more

Government Chip Funding Spreads Globally


This is the first in a series of articles tracking government chip investments. Countries around the world are ramping up investments into their semiconductor industries as part of new or existing approaches. The increased government activity stems from growing awareness of the strategic importance of the chip sector, a desire to avoid a repeat of pandemic-era supply chain issues, and height... » read more

Security Technical Paper Roundup: Aug. 27


A number of hardware security-related technical papers were presented at the August 2024 USENIX Security Symposium. The organization provides open access research, and the presentation slides and papers are free to the public. Topics include side-channel attacks and defenses, embedded security, fuzzing, fault injection, logic locking, Rowhammer, and more. Here are some highlights with associate... » read more

Chip Industry Week In Review


Chinese firms imported almost $26 billion worth of chipmaking machinery, according to fresh trade data released by China’s General Administration of Customs this week, Bloomberg reports. Meanwhile, the global semiconductor manufacturing industry continued to show signs of improvement in Q2 2024 with significant growth of IC sales, stabilizing capital expenditure, and an increase in install... » read more

A Generic Approach For Fuzzing Arbitrary Hypervisors


A technical paper titled “HYPERPILL: Fuzzing for Hypervisor-bugs by Leveraging the Hardware Virtualization Interface” was presented at the August 2024 USENIX Security Symposium by researchers at EPFL, Boston University, and Zhejiang University. Abstract: "The security guarantees of cloud computing depend on the isolation guarantees of the underlying hypervisors. Prior works have presented... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan Renesas will acquire Transphorm, which designs and manufactures gallium nitride power devices, for about $339 million. GaN, which is a wide-bandgap technology, is used for high-voltage applications in a slew of markets, including EVs and EV fast chargers, as well as data centers and industrial applications. Cadence acquired Invecas, a provider o... » read more

Research Bits: Dec. 18


Stacking 2D layers for AI processing Researchers from Washington University in St. Louis, MIT, Yonsei University, Inha University, Georgia Institute of Technology, and the University of Notre Dame demonstrated monolithic 3D integration of layered 2D material, creating a novel AI processing hardware that integrates sensing, signal processing, and AI computing functions into a single chip. Th... » read more

Technical Paper Roundup: Sept. 12


New technical papers added to Semiconductor Engineering’s library this week. [table id=51 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

New Processor Fuzzing Mechanism


Researchers from Boston University and University of Washington published a technical paper titled "ProcessorFuzz: Guiding Processor Fuzzing using Control and Status Registers." Abstract "As the complexity of modern processors has increased over the years, developing effective verification strategies to identify bugs prior to manufacturing has become critical. Undiscovered micro-architectur... » read more

TAP-2.5D: A Thermally-Aware Chiplet Placement Methodology for 2.5D Systems


Abstract "Heterogeneous systems are commonly used today to sustain the historic benefits we have achieved through technology scaling. 2.5D integration technology provides a cost-effective solution for designing heterogeneous systems. The traditional physical design of a 2.5D heterogeneous system closely packs the chiplets to minimize wirelength, but this leads to a thermally-inefficient design... » read more

← Older posts