Research Bits: Dec. 18

2D materials: AI processing; defect-free integration; optical memory.

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Stacking 2D layers for AI processing

Researchers from Washington University in St. Louis, MIT, Yonsei University, Inha University, Georgia Institute of Technology, and the University of Notre Dame demonstrated monolithic 3D integration of layered 2D material, creating a novel AI processing hardware that integrates sensing, signal processing, and AI computing functions into a single chip.

The monolithic 3D-integrated chip contains six atomically thin 2D layers of transistor and memristor arrays, each with its own function and dense interlayer connectivity.

Schematic illustration of an edge computing system based on monolithic 3D-integrated, 2D material-based electronics. The system stacks different functional layers, including AI computing layers, signal-processing layers and a sensory layer, and integrates them into an AI processor. (Credit: Sang-Hoon Bae / Washington University in St. Louis)

“From autonomous vehicles to medical diagnostics and data centers, the applications of this monolithic 3D integration technology are potentially boundless. For example, in-sensor computing combines sensor and computer functions in one device, instead of a sensor obtaining information then transferring the data to a computer. That lets us obtain a signal and directly compute data resulting in faster processing, less energy consumption and enhanced security because data isn’t being transferred,” said Sang-Hoon Bae, an assistant professor of mechanical engineering and materials science at Washington University in St. Louis, in the university’s news article. “Atomically thin 2D materials are ideal for this, and my collaborators and I will continue improving this material until we can ultimately integrate all functional layers on a single chip.” [1]

Defect-free 2D material integration

Researchers from MIT, Boston University, National Tsing Hua University, the National Science and Technology Council of Taiwan, and National Cheng Kung University developed a new technique to integrate 2D materials into devices in a single step while keeping the surfaces of the materials and the resulting interfaces pristine and free from defects.

The method overcomes challenges with binding certain materials using van der Waals forces. “Van der Waals integration has a fundamental limit,” said Farnaz Niroui, assistant professor of electrical engineering and computer science at MIT, in the university’s news article. “Since these forces depend on the intrinsic properties of the materials, they cannot be readily tuned. As a result, there are some materials that cannot be directly integrated with each other using their van der Waals interactions alone. We have come up with a platform to address this limit to help make van der Waals integration more versatile, to promote the development of 2D-materials-based devices with new and improved functionalities.”

The researchers formed a hybrid matrix of high-adhesion metals and low-adhesion insulators on a carrier substrate. This surface is then peeled off and flipped over to reveal a completely smooth top surface that contains the building blocks of the desired device.

“Once the hybrid surface is brought into contact with the 2D layer, without needing any high-temperatures, solvents, or sacrificial layers, it can pick up the 2D layer and integrate it with the surface. This way, we are allowing a van der Waals integration that would be traditionally forbidden, but now is possible and allows formation of fully functioning devices in a single step,” said Peter Satterthwaite, an electrical engineering and computer science graduate student at MIT, in the university’s news article.

They used this approach to fabricate arrays of 2D transistors that achieved new functionalities compared to devices produced using conventional fabrication techniques. The researchers say the method is versatile enough to be used with many materials and could have diverse applications in high-performance computing, sensing, and flexible electronics. [2]

2D-0D optical memory

Researchers from the Korea Institute of Science and Technology (KIST), Daegu Gyeongbuk Institute of Science and Technology, Korea University, and Japan’s National Institute for Materials Science fabricated a new zero-dimensional and two-dimensional (2D-0D) semiconductor artificial junction material by joining quantum dots in a core-shell structure with zinc sulfide (ZnS) on the surface of cadmium selenide (CdSe) and a molybdenum sulfide (MoS2) semiconductor. The new material enables the storage and manipulation of electronic states within quantum dots measuring 10 nm or less and can be powered by light.

When light is applied to the cadmium selenide core, a certain number of electrons flow out of the molybdenum sulfide semiconductor, trapping holes in the core and making it conductive. The electron state inside cadmium selenide is also quantized. Intermittent light pulses trap electrons in the electron band one after the other, inducing a change in the resistance of the molybdenum sulfide through the field effect, and the resistance changes in a cascading manner depending on the number of light pulses. This process makes it possible to divide and maintain more than 0 and 10 states, unlike conventional memory, which has only 0 and 1 states. The zinc sulfide shell also prevents charge leakage between neighboring quantum dots, allowing each single quantum dot to function as a memory.

While quantum dots in conventional 2D-0D semiconductor artificial junction structures simply amplify signals from light sensors, the team’s quantum dot structure perfectly mimics the floating gate memory structure, giving it potential for use as a next-generation optical memory. The researchers verified the effectiveness of the polynomial memory phenomenon with neural network modeling using the CIFAR-10 dataset and achieved a 91% recognition rate. [3]

References

[1] Kang, JH., Shin, H., Kim, K.S. et al. Monolithic 3D integration of 2D materials-based electronics towards ultimate edge computing solutions. Nat. Mater. 22, 1470–1477 (2023). https://doi.org/10.1038/s41563-023-01704-z

[2] Satterthwaite, P.F., Zhu, W., Jastrzebska-Perfect, P. et al. Van der Waals device integration beyond the limits of van der Waals forces using adhesive matrix transfer. Nat Electron (2023). https://doi.org/10.1038/s41928-023-01079-8

[3] H.-S. Ra, T. W. Kim, D. A. Taylor, J.-J. Lee, S. Song, J. Ahn, J. Jang, T. Taniguchi, K. Watanabe, J. W. Shim, J.-S. Lee, D. K. Hwang, Probing Optical Multi-Level Memory Effects in Single Core-Shell Quantum Dots and Application Through 2D–0D Hybrid Inverters. Adv. Mater. 2023, 35, 2303664. https://doi.org/10.1002/adma.202303664



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