Chip Industry Technical Paper Roundup: July 21


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations StreamDQ: Near-Memory Weight DeQuantization in Custom HBM for Scalable AI Inference Acceleration SK hynix Open DRAM Model—Part II: Enabling Processing-in-Memory in 3-D DRAM Georgia Institute of Technology Evaluating Hardware Abstraction Layer Concep... » read more

Open DRAM Model For PIM Analysis In 3D DRAM (Georgia Tech)


Researchers from Georgia Institute of Technology published a technical paper titled “Open DRAM Model—Part II: Enabling Processing-in-Memory in 3-D DRAM.” Abstract Excerpt: “In this work, we present an “Open DRAM Model” that enables comprehensive circuit-level analysis of DRAM operations across multiple architectures, including conventional 6F2 BCAT, scaled 4F2 VCT, and monolit... » read more

Chip Industry Technical Paper Roundup: July 8


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Effect of Exchange-Correlation Functionals on Schottky Barriers at Si/Metal Interfaces NIST, University of Maryland, Johns Hopkins University AgRefactor: Self-Evolving Agentic Workflow for HLS Compatibility and Performance Carnegie Mellon University, UCLA ... » read more

Probabilistic Memory Architecture That Bridges The Gap Between RNG Sampling and Memory Access (Notre Dame, Georgia Tech, Villanova)


Researchers from University of Notre Dame, Georgia Institute of Technology, and Villanova University published a technical paper titled “Probabilistic Memory for Trustworthy Edge Intelligence.” Summary: The paper introduces p-MEM as “a unified memory primitive” that samples at “the native memory bandwidth.” It reports reductions in instruction count, sampling latency, and energy ... » read more

Chip Industry Week In Review


Dealmaking Amkor inked a 10-year agreement with TSMC to provide advanced packaging and test services in Arizona, tying TSMC’s U.S. fab expansion to domestic OSAT capacity. Trump said in a post that Apple will partner with Intel on chip design and production in the U.S., marking a second reported win for the chipmaker this month. Intel Foundry will also reportedly manufacture 3 million... » read more

Research Bits: June 15


NAND in space Researchers from Georgia Institute of Technology and Pennsylvania State University built ferroelectric NAND flash memory chips that can withstand up to 30 times higher radiation levels compared to conventional NAND. “If you send traditional flash memory to space, the radiation interacting with flash memory’s trapped electric charge can easily corrupt the data,” said Asif... » read more

Analyzing Rowhammer Vulnerability in Monolithic 3D IWO eDRAM for Edge (ASU, Georgia Tech)


Researchers from Arizona State University and Georgia Institute of Technology published “Thermal- and Aging-Aware Rowhammer Vulnerability Analysis of Monolithically-Integrated IWO eDRAM for Edge Platforms”. "This work presents the first comprehensive temperature- and aging-aware vulnerability analysis of amorphous Indium Tungsten Oxide (IWO) embedded DRAM (eDRAM), a promising next-... » read more

Oxides Bring Low Leakage Transistors To Leading-Edge Memories


AI workloads need to position more memory that uses less power in ever-closer proximity to computational logic. That overriding imperative is driving new memory designs and new materials exploration across a wide range of applications, including cache memory, working memory, as well as a new category, non-volatile memory used for direct computation. The largest of these, by volume, is workin... » read more

Chip Industry Technical Paper Roundup: Dec 30


New technical papers recently added to Semiconductor Engineering’s library: [table id=509 /] Find more semiconductor research papers here. » read more

Physical Modeling and Benchmarking for 2T-SOT-MRAM (Georgia Tech, MIT, Cornell)


A new technical paper titled "Modeling and Optimization of Two-Terminal Spin-Orbit-Torque MRAM" was published by researchers at Georgia Institute of Technology, MIT, and Cornell University. Abstract "This paper presents physical modeling and benchmarking for two-terminal spin-orbit torque magnetic random-access memory (2T-SOT-MRAM). The results indicate that the common SOT materials that ... » read more

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