Chip Industry Technical Paper Roundup: Jan. 16


New technical papers added to Semiconductor Engineering’s library this week. [table id=188 /] More ReadingTechnical Paper Library home » read more

Demonstrating A 2D–0D Hybrid Optical Multi-Level Memory Device Operated By Laser Pulses


A technical paper titled “Probing Optical Multi-Level Memory Effects in Single Core–Shell Quantum Dots and Application Through 2D-0D Hybrid Inverters” was published by researchers at Korea Institute of Science and Technology (KIST), Korea University, Daegu Gyeongbuk Institute of Science and Technology (DGIST), National Institute for Materials Science (Japan), and University of Science and... » read more

Research Bits: Dec. 18


Stacking 2D layers for AI processing Researchers from Washington University in St. Louis, MIT, Yonsei University, Inha University, Georgia Institute of Technology, and the University of Notre Dame demonstrated monolithic 3D integration of layered 2D material, creating a novel AI processing hardware that integrates sensing, signal processing, and AI computing functions into a single chip. Th... » read more

Research Bits: May 23


DNA-based molecular computing Researchers at the University of Minnesota proposed a new method of biocomputing. Trumpet, or Transcriptional RNA Universal Multi-Purpose GatE PlaTform, uses biological enzymes as catalysts for DNA-based molecular computing. Researchers performed logic gate operations in test tubes using DNA molecules. A positive gate connection resulted in a phosphorescent glo... » read more

Chip Industry’s Technical Paper Roundup: Mar. 6


New technical papers recently added to Semiconductor Engineering’s library: [table id=84 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Ternary LIM Operation of the TNAND and TNOR Universal Gates Using DG Feedback FETs


A technical paper titled "Logic-in-Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double-Gated Feedback Field-Effect Transistors" was published by researchers at Korea University. Abstract "In this study, the logic-in-memory operations are demonstrated of ternary NAND and NOR logic gates consisting of double-gated feedback field-effect transistors. The component transistor... » read more

Research Bits: Dec. 20


Patch tracks blood in deep tissue A skin-worn photoacoustic patch developed by a research team at the University of California San Diego is equipped with arrays of laser diodes and piezoelectric transducers to detect biomolecules in deep tissues, which usually would require a magnetic resonance imaging (MRI) and X-ray-computed tomography. The patch may help doctors tract hemoglobin in real tim... » read more

Chip Industry’s Technical Paper Roundup: Oct 25


New technical papers added to Semiconductor Engineering’s library this week. [table id=59 /] » read more

Memory-Computation Decoupling Execution To Achieve Ideal All-Bank PIM Performance


A new technical paper titled "Achieving the Performance of All-Bank In-DRAM PIM With Standard Memory Interface: Memory-Computation Decoupling" was published by researchers at Korea University. "This paper proposed the memory-computation decoupled PIM architecture to provide the performance comparable to the all-bank PIM while preserving the standard DRAM interface, i.e., DRAM commands, powe... » read more

Technical Paper Roundup: Aug. 30


New technical papers added to Semiconductor Engineering’s library this week. [table id=47 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

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