tag: Korea Institute of Science and Technology

Chip Industry Technical Paper Roundup: Jan. 16
By Liz Allan - 16 Jan, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=188 /] More ReadingTechnical Paper Library home » read more

Demonstrating A 2D–0D Hybrid Optical Multi-Level Memory Device Operated By Laser Pulses
By Technical Paper Link - 11 Jan, 2024 - Comments: 0

A technical paper titled “Probing Optical Multi-Level Memory Effects in Single Core–Shell Quantum Dots and Application Through 2D-0D Hybrid Inverters” was published by researchers at Korea Institute of Science and Technology (KIST), Korea University, Daegu Gyeongbuk Institute of Science and Technology (DGIST), National Institute for Materials Science (Japan), and University of Science and... » read more

Research Bits: Dec. 18
By Jesse Allen - 18 Dec, 2023 - Comments: 0

Stacking 2D layers for AI processing Researchers from Washington University in St. Louis, MIT, Yonsei University, Inha University, Georgia Institute of Technology, and the University of Notre Dame demonstrated monolithic 3D integration of layered 2D material, creating a novel AI processing hardware that integrates sensing, signal processing, and AI computing functions into a single chip. Th... » read more

Chip Industry’s Technical Paper Roundup: Oct 18
By Linda Christensen - 18 Oct, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

Research Bits: Oct. 18
By Jesse Allen - 18 Oct, 2022 - Comments: 0

Modular AI chip Engineers at the Massachusetts Institute of Technology (MIT), Harvard University, Stanford University, Lawrence Berkeley National Laboratory, Korea Institute of Science and Technology, and Tsinghua University created a modular approach to building stackable, reconfigurable AI chips. The design comprises alternating layers of sensing and processing elements, along with LEDs t... » read more

Highly Dense And Vertically Aligned Sub-5 nm Silicon Nanowires
By Technical Paper Link - 11 Oct, 2022 - Comments: 0

A new technical paper titled "Catalyst-free synthesis of sub-5 nm silicon nanowire arrays with massive lattice contraction and wide bandgap" was published by researchers at Northeastern University, Korea Institute of Science and Technology, Gyeongsang National University and others. "Here, we prepare highly dense and vertically aligned sub-5 nm silicon nanowires with length/diameter aspect r... » read more

Research Bits: Oct. 4
By Jesse Allen - 04 Oct, 2022 - Comments: 0

2D electrode for ultra-thin semiconductors Researchers from the Korea Institute of Science and Technology (KIST), Japan's National Institute for Materials Science, and Kunsan National University designed two-dimensional semiconductor-based electronic and logic devices, with electrical properties that can be selectively controlled through a new 2D electrode material, chlorine-doped tin diseleni... » read more

Technical Paper Round-Up: July 26
By Linda Christensen - 26 Jul, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=41 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

Split-Gate FETs (SG-FETs)
By Technical Paper Link - 21 Jul, 2022 - Comments: 0

This technical paper titled "Longitudinal and latitudinal split-gate field-effect transistors for NAND and NOR logic circuit applications" was published by researchers at Department of Electrical and Computer Engineering, Inha University (South Korea) and Korea Institute of Science and Technology (KIST), Seoul. Abstract "Two-dimensional (2D) materials have been extensively adopted in variou... » read more

Research Bits: July 18
By Jesse Allen - 18 Jul, 2022 - Comments: 0

CXL memory disaggregation Researchers from the Korea Advanced Institute of Science and Technology (KAIST) developed a Compute Express Link (CXL) solution for directly accessible, high-performance memory disaggregation that they say significantly improves performance compared to existing remote direct memory access (RDMA)-based memory disaggregation. RDMA enables a host to directly access an... » read more

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