provigil and risperdal, provigil free shipping, over the counter alternative to provigil, provigil overdose dosage, provigil modiodal, provigil and seizure threshold

tag: Cadence

Is Cloud Computing Suitable for Chip Design?
By Brian Bailey - 27 Sep, 2018 - Comments: 2

Is semiconductor design being left behind in a cloud-dominated world? Finance, CRM, office applications and many other sectors have made the switch to a cloud-based computing environment, but the EDA industry and its users have hardly started the migration. Are EDA needs and concerns that different from everyone else? We are starting to see announcements from EDA companies, but few cheerleaders... » read more

The Revenge Of The Digital Twins
By Frank Schirrmeister - 27 Sep, 2018 - Comments: 0

How do we verify artificial intelligence? Even before “smart digital twins” get as advanced as shown in science fiction shows, making sure they are “on our side” and don’t “go rogue” will become a true verification problem. There are some immediate tasks the industry is working on—like functional safety and security—but new verification challenges loom on the horizon. As in pr... » read more

Domain Crossing Nightmares
By Brian Bailey - 27 Sep, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss problems associated with domain crossings with Alex Gnusin, design verification technologist for Aldec; Pete Hardee, director, product management for Cadence; Joe Hupcey, product manager and verification product technologist for Mentor, a Siemens Business; Sven Beyer, product manager design verification for OneSpin; and Godwin Maben, applications en... » read more

Analog Reliability Analysis for Mission-Critical Applications
By Cadence - 26 Sep, 2018 - Comments: 0

Rapidly increasing electrical content in automobiles is driving the need for revolution in analog integrated circuit (IC) design methodology. Compared to designing for consumer electronics, designing for mission-critical applications—industrial, medical, space, and automotive—requires a different approach to reliability analysis. We will explore how reliability analysis needs to change for ... » read more

Blog Review: Sept. 26
By Jesse Allen - 26 Sep, 2018 - Comments: 0

VLSI Research's Dan Hutcheson chats with GlobalFoundries CEO Tom Caulfield about the company's changing strategy, how the company got to its present point, and how many companies will be using leading edge technologies. Synopsys' Taylor Armerding looks for what's changed (or not) for the state of software security and breach disclosure regulations in the year since the massive Equifax data b... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Sep, 2018 - Comments: 0

Tools & IP Cadence unveiled deep neural-network accelerator (DNA) AI processor IP, Tensilica DNA 100, targeted at on-device neural network inference applications. The processor is scalable from 0.5 TMAC (Tera multiply-accumulate) to 12 TMACs, or 100s of TMACs with multiple processors stacked, and the company claims it delivers up to 4.7X better performance and up to 2.3X more performance p... » read more

Blog Review: Sept. 19
By Jesse Allen - 19 Sep, 2018 - Comments: 0

Applied Materials' David Thompson shares the new DARPA program that is focused on using correlated electrons to develop a new type of switch with quantum effects, potentially leading to unprecedented switching speeds. Mentor's Joe Hupcey III argues that for the most effective formal analysis, assertions should be as simple as possible and shares some tips on decomposing big assertions. Ca... » read more

Aging In Advanced Nodes
By Ann Steffora Mutschler - 17 Sep, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; Magdy Abadir, vice president of marketing at ... » read more

Designers Face Growing Problems With On-Chip Power Distribution
By Marc Swinnen - 13 Sep, 2018 - Comments: 0

The technology evolution in semiconductor manufacturing has led to chips with ever-higher power densities, which is leading to serious problems with on-chip power distribution. Specifically, the problems surrounding voltage drop—or IR drop (from V=IxR)—have become so acute that we have seen multiple companies starting to get back dead silicon from the fab. For example, a recent 7nm chip ... » read more

Enabling Cheaper Design
By Brian Bailey - 13 Sep, 2018 - Comments: 1

While the EDA industry tends to focus on cutting edge designs, where design costs are a minor portion of the total cost of product, the electronics industry has a very long tail. The further along the tail you go, the more significant design costs become as a percent of total cost. Many of those designs are traditionally built using standard parts, such as microcontrollers, but as additional... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2018 SMG   |  Terms of Service  |  Privacy Policy