tag: Cadence

Blog Review: June 25
By Jesse Allen - 25 Jun, 2025 - Comments: 0

Siemens’ John McMillan provides a detailed overview of 3D-IC technology and heterogeneous integration, from the market trends driving its adoption to the design, verification, and manufacturing challenges involved. Synopsys’ Gunnar Braun and Stewart Williams check out how cloud-based development practices and virtual prototypes can enable earlier and more efficient testing and validation... » read more

EDA’s Top Execs Map Out An AI-Driven Future
By Ed Sperling - 23 Jun, 2025 - Comments: 0

Artificial intelligence is permeating the entire semiconductor ecosystem, forcing fundamental changes in AI chips, the design tools used to create them, and the methodologies used to ensure they will work reliably. This is a global race that will redefine nearly every domain over the next decade. In presentations and interviews over the past several months, top EDA executives converged on th... » read more

Chip Industry Week in Review
By The SE Staff - 20 Jun, 2025 - Comments: 0

Texas Instruments will invest more than $60 billion to build and expand seven semiconductor fabs in Texas and Utah, supporting more than 60,000 U.S. jobs. Chinese automakers — including SAIC Motor, Changan, Great Wall Motor, BYD, Li Auto and Geely — are aiming to launch new models with 100% homemade chips, some as early as 2026, reports Nikkei Asia. Marvell introduced 2nm custom SRAM ... » read more

Can You Build A Known-Good Multi-Die System?
By Ed Sperling - 18 Jun, 2025 - Comments: 0

Semiconductor Engineering sat down to discuss the challenges of designing and testing multi-die systems, including how to ensure they will work as expected, with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Zeng, senior engineering group director at Cadenc... » read more

Blog Review: June 18
By Jesse Allen - 18 Jun, 2025 - Comments: 0

Synopsys’ John Koeter and other industry experts discuss whether high-bandwidth memory should follow established standards for broad compatibility and scalability or be customized to address specific use case requirements and time-to-market targets. In a podcast, Siemens’ Conor Peick, Dale Tutt, and Mike Ellow chat about how progress in 3D-IC development, thermal management, and the indu... » read more

Chip Industry Week in Review
By The SE Staff - 13 Jun, 2025 - Comments: 0

The Chinese Academy of Sciences unveiled a fully automated processor chip design system, claiming the potential to accelerate semiconductor development and replace human programmers. Micron Technology plans to expand its U.S. investments to approximately $150 billion in domestic memory manufacturing and $50 billion in R&D, which is $30 billion higher than previously reported. AMD laun... » read more

Multi-Die Assemblies Complicate Parasitic Extraction
By Ann Mutschler - 12 Jun, 2025 - Comments: 0

The shift from planar designs to multi-die assemblies with complex interconnects is transforming what had become almost an afterthought in the design process into a first-order challenge. Parasitics include things like inductance, capacitance, and resistance, which have become more problematic at advanced nodes due to increasing logic density, thinner interconnects and insulators, and a spik... » read more

The Best DRAMs For Artificial Intelligence
By Bryon Moyer - 12 Jun, 2025 - Comments: 0

Artificial intelligence (AI) involves intense computing and tons of data. The computing may be performed by CPUs, GPUs, or dedicated accelerators, and while the data travels through DRAM on its way to the processor, the best DRAM type for this purpose depends on the type of system that is performing the training or inference. The memory challenge facing engineering teams today is how to keep... » read more

Verification Software And Methodology Insights
By Robbie O'Sullivan - 12 Jun, 2025 - Comments: 0

Earlier this month, I had the opportunity to attend CadenceLIVE Silicon Valley 2025. Among the many engaging sessions, the Verification Software track highlighted how leading companies are advancing verification methodologies to meet the demands of increasingly complex designs. The track featured seven presentations from industry leaders, each offering a unique perspective on how SVG’s verif... » read more

Designing For Reliability With A System Life Estimator
By Cadence - 11 Jun, 2025 - Comments: 0

From big machines to small handheld equipment, all typically come with varying warranty timelines based on estimations. If this number is overestimated or underestimated, it can incur millions of dollars in losses to manufacturers. That’s why it’s important to look at the lifetime system estimation as a bottom-up process. The efficiency in this approach results in a robust method to formula... » read more

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