The Week In Review: Design


Tools Cadence unveiled an integrated memory design and verification tool, with environments for bitcell design, array and complier verification, and memory characterization. It utilizes existing simulation databases for multi-corner and Monte Carlo analysis, which the company says can lead to a 2X runtime improvement. Solido Design Automation uncorked PVTMC Verifier, which uses machine lear... » read more

Executive Insight: Lip-Bu Tan


Semiconductor Engineering sat down with Lip-Bu Tan, president and CEO of [getentity id="22032" e_name="Cadence"], to discuss disruptions and changes in the semiconductor industry, from machine learning and advance packaging to tools and business. What follows are excerpts of that conversation. SE: What do you see as the next big thing? Tan: Unlike mobility or cell phones, or PCs before th... » read more

Integrated Photonics


Semiconductor Engineering sat down to discuss the status of integrated photonics with Twan Korthorst, CEO for PhoeniX Software; Gilles Lamant, distinguished engineer for [getentity id="22032" e_name="Cadence"]; Bill De Vries, director of marketing for Lumerical Solutions; and Brett Attaway, director of EPDA solutions at AIM Photonics, SUNY Polytechnic Institute. What follows are excerpts of tha... » read more

Blog Review: Sept. 6


Mentor's Jeff Miller explains why hardware security is important for IoT edge devices, where vulnerabilities lie today, and how researchers created an undetectable backdoor attack circuit. Cadence's Meera Collier argues that while AI is getting good at many things, composing music is not yet one of them. Synopsys' Robert Vamosi considers the state of voting machine security as security re... » read more

Executive Insight: Wally Rhines


Wally Rhines, president and CEO of [getentity id="22017" e_name="Mentor, a Siemens Business"], sat down with Semiconductor Engineering to talk about industry consolidation, a shift in emphasis from chips to systems, and what the recent acquisition by Siemens will mean for Mentor. What follows are excerpts of that conversation. SE: A year ago it looked as if the entire industry was going to b... » read more

Blog Review: Aug. 30


Cadence's Meera Collier explains machine learning, unsupervised algorithms, and why Facebook's recently publicized AI chatbot conversation isn't as inscrutable as it sounds. Synopsys' Robert Vamosi considers recently proposed legislation which seeks to mitigate the risk of botnets commandeering IoT devices used in the U.S. government, including limiting the use of hard-coded passwords and ce... » read more

Integrated Photonics


Semiconductor Engineering sat down to discuss the status of integrated photonics with Twan Korthorst, CEO for PhoeniX Software; Gilles Lamant, distinguished engineer for [getentity id="22032" e_name="Cadence"]; Bill De Vries, director of marketing for Lumerical Solutions; and Brett Attaway, director of EPDA solutions at AIM Photonics, SUNY Polytechnic Institute. What follows are excerpts of tha... » read more

Tools To Design CNNs


Convolutional neural networks are becoming a mainstay in machine learning and artificial intelligence, allowing a network of distributed sensors to collect data and send them to a central brain for processing. This is a relatively simple idea in comparison to today's technology, and the idea of the [getkc id="261" kc_name="convolutional neural network"] has been around for some time. But bui... » read more

One Belt, One Road


China's so-called One Belt, One Road policy on global trade could have significant repercussions on semiconductors and IP if it succeeds. It's hardly a slam-dunk, and China has been vying for a larger position in the semiconductor industry for some time. But this is a completely different strategy because China is not attempting to go it alone this time. China has been rather quietly build... » read more

Portable Stimulus Status Report


The first release of the Portable Stimulus (PS) standard is slated for early next year. If it lives up to its promise, it could be the first new language and abstraction for verification in two decades. [getentity id="22028" e_name="Accellera"] uncorked the PS Early Adopter release at the Design Automation Conference (DAC) in June. The standard has been more than two years in the making by t... » read more

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