Outlook 2025: Embracing Chiplets

By Steve Brown - 26 Nov, 2024 - Comments: 0

The semiconductor industry is rapidly evolving, and as we look towards 2025, chiplets are at the forefront of this transformation. The shift from traditional monolithic system-on-chip (SoC) designs to chiplet-based architectures is gaining momentum, driven by the need to meet ever-increasing computing demands. This evolution is not just a trend; it represents a fundamental change in how we appr... » read more

Locking When Emulating Xtensa LX Multi-Core On A Xilinx FPGA

By Nayan Gaywala - 31 Oct, 2024 - Comments: 0

Today's high-performance computing systems often require the designer to instantiate multiple CPU or DSP cores in their subsystem. However, the performance gained by using multiple CPUs comes with additional programming complexity, especially when accessing shared memory data structures and hardware peripherals. CPU cores need to access shared data in an atomic fashion in a multi-core environme... » read more

DDR5 UDIMM Evolution To Clock Buffered DIMMs (CUDIMM)

By Shyam Sharma - 26 Sep, 2024 - Comments: 0

DDR5 is the latest generation of PCDDR memory that is used in a wide range of application like data centers, Laptops and personal computers, autonomous driving systems, servers, cloud computing, and gaming are now increasingly being used for AI applications with advances in memory bandwidth and density to allow DDR5 DIMMs (Dual Inline Memory Modules) to support densities higher then 256 GB per ... » read more

GDDR7: The Ideal Memory Solution In AI Inference

By Frank Ferro - 29 Aug, 2024 - Comments: 1

The generative AI market is experiencing rapid growth, driven by the increasing parameter size of Large Language Models (LLMs). This growth is pushing the boundaries of performance requirements for training hardware within data centers. For an in-depth look at this, consider the insights provided in "HBM3E: All About Bandwidth". Once trained, these models are deployed across a diverse range of... » read more

Debugging SystemVerilog Constraint Randomization: A Comprehensive Guide

By Rich Chang - 25 Jul, 2024 - Comments: 0

SystemVerilog constraint randomization is a powerful methodology for generating realistic and diverse test scenarios in the realm of hardware design verification. However, like any complex methodology, it can sometimes be challenging to debug when an unexpected issue arises. In this article, we will explore common debug techniques and strategies to help you effectively troubleshoot your SystemV... » read more

Navigating The Future Of EDA

By Anika Sunda - 27 Jun, 2024 - Comments: 0

The landscape of electronic design automation (EDA) is undergoing a monumental transformation. The catalysts? Artificial Intelligence (AI) and Machine Learning (ML). These technological marvels are not just reshaping how we approach design and verification in electronics; they are redefining the possibilities within the field. Our latest podcast episode delved deep into this topic, uncovering t... » read more

AI-Powered Data Analytics To Revolutionize The Semiconductor Industry

By Reela Samuel - 30 May, 2024 - Comments: 1

In the age where data reigns supreme, the semiconductor industry stands on the cusp of revolutionary change, redefining complexity and productivity through a lens crafted by artificial intelligence (AI). The intersection of AI and the semiconductor industry is not merely an emerging trend—it is the fulcrum upon which the next generation of technological innovation balances. Semiconductor comp... » read more

Exploring The Security Framework Of RISC-V Architecture In Modern SoCs

By Anika Sunda - 25 Apr, 2024 - Comments: 0

In the rapidly evolving world of technology, system-on-chip (SoC) designs have become a cornerstone for various applications, from automotive and mobile devices to data centers. These complex systems integrate multiple processors, a multi-level cache hierarchy, and various subsystems that share memory and system resources. However, this open access to shared memory and resources introduces pote... » read more

Jumpstarting The Automotive Chiplet Ecosystem

By Steve Brown - 28 Mar, 2024 - Comments: 0

The automotive industry stands on the cusp of a technological renaissance, ushering in an era where vehicles aren't just tools of transportation, but interconnected nodes within a vast network of software-defined mobility. Central to this transformation is the concept of chiplets—miniaturized, modular components that can be mixed, matched, and scaled to create powerful, application-specific i... » read more

Weak Verification Plans Lead To Project Disarray

By Anika Sunda - 29 Feb, 2024 - Comments: 0

The purpose of the verification plan, or vplan as we call it, is to capture all the verification goals needed to prove that the device works as specified. It’s a big responsibility! Getting it right means having a good blueprint for verification closure. However, getting it wrong could result in bug escapes, wasting of resources, and possibly lead to a device failing altogether. With the foc... » read more

← Older posts

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.