224G SerDes Trend and Solution

As an industry early mover to support the emerging 800G/1.6T networks, Cadence taped out the 224G-LR SerDes PHY IP on TSMC’s 3nm process at the beginning of the year and expects the silicon to arrive soon. The IP supports 1-225Gbps data rates with excellent BER at long reach (LR). The ever-increasing bandwidth requirement in hyperscale data centers is driving the rapid growth of high-speed I/... » read more

Revolutionizing Product Development And User Experience: The Transformative Power Of Generative AI

Generative AI has become a prominent and versatile solution across various domains, including chip and system development. Its progress and impact have outpaced many other technological advancements, significantly benefiting numerous areas. In the semiconductor industry, EDA tools with generative AI have already established their position by offering unparalleled optimization capabilities. Thes... » read more

The History Of CMOS

Since CMOS has been around for about 50 years, a comprehensive history would be a book. This blog focuses on what I consider the major transitions. NMOS Before CMOS, there was NMOS (also PMOS, but I have no direct experience with that). An NMOS gate consisted of a network of N-transistors between the output and Vss, and a resistor (actually a transistor with an implant) between the output and... » read more

Notes From CadenceLIVE Silicon Valley 2023

Last week was CadenceLIVE Silicon Valley, held at the Santa Clara Convention Center, and took place, as usual, over two days. It was very well attended and everywhere seemed fairly crowded. The structure of CadenceLIVE was that the first morning was taken up with four keynotes. Then the rest of the day and all of the following day were taken up with about ten parallel technical tracks. And at l... » read more

Like Wayne Gretzky, EDA Aims To Be Where The Puck Is Going, Not Where It Has Been

When I launched this blog series, I set out to share some of the more unique industry transitions I’ve witnessed over my 20+ year career in EDA. The B2B sales process has not been immune to change and transition. In fact, you could create a college curriculum with a daunting syllabus on the major transitions that have impacted the B2B sales process. I won’t drop that on you. The room wh... » read more

How To Make Chiplets A Viable Market

At the recent Chiplet Summit, there was a panel session on the last afternoon titled "How to Make Chiplets a Viable Market." The panel was moderated by Meta's Ravi Agarwal, and the panelists were (from left to right in the photo): Travis Lanier of Ventana Micro Systems...actually Travis couldn't make it and Ventana was represented by Charles, but I didn't catch his last name Clint Walk... » read more

IEDM: TSMC N3 Details

I attended IEDM in San Francisco in December. There were two presentations about TSMC's N3 process. This is actually a bit of a misnomer since TSMC has two N3 processes, one simply called N3. The other (the second generation) is called N3E. The two papers were: Critical Process Features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond A 3nm CMOS FinFl... » read more

IEDM Keynote: Ann Kelleher On Future Technology

IEDM 2022 celebrated 75 Years of the Transistor. I can't imagine anything else invented in the last 75 years has had as much effect on my life, and probably yours, too. After the awards session, the conference got underway with a keynote by Ann Kelleher, Executive Vice President and General Manager of Technology Development at Intel. It was titled "Celebrating 75 Years of the Transistor! A L... » read more

Effective Measurement Is The Key To Meeting Environmental Sustainability Goals In Data Centers

Hyperscale compute, using high-performance connected processors, continually transforms our lives as more and more applications rely on this type of compute, and at the heart of this hyperscale revolution are data centers. It is estimated that an equal amount of power is required for the airflow and cooling systems as for IT equipment. The pressure is on for organizations to create and adopt l... » read more

Holistic 3D-IC Interposer Analysis In Product Designs

The miniaturization trend in electronic devices and the rise in smart and IoT device segments make adopting heterogeneous integration of chip components or 3D-ICs a viable option for miniaturization and better interconnection. This vertical stacking of ICs enables the next generation of sophisticated, intelligent devices, necessitating high chip density and terabytes of bandwidth. As per the f... » read more

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