Week In Review: Design, Low Power


Synopsys added MIPI C-PHY/D-PHY IP for a range of FinFET processes, adding to its MIPI camera and display IP portfolio. The C-PHY/D-PHY meet functional safety and reliability requirements of automotive ADAS and infotainment applications. It supports low-power state modes and delivers below 1.3pJ/bit at 24 Gb/s. The IP enables 4K and beyond displays and 100-megapixel cameras with support for up ... » read more

Blog Review: April 1


Rambus' Steven Woo takes an in-depth look at on-chip memory for high performance AI applications and explores some of the primary differences between HBM and GDDR6. Synopsys' Taylor Armerding warns of the risks of legacy vulnerabilities, where software has problems that were never fixed then forgotten about or never discovered in the first place, and key steps for finding and addressing them... » read more

Medical, Industrial & Aerospace IC Design Changes


Medical, industrial and aerospace chips are becoming much more complex as more intelligence is added into these devices, forcing design teams to begin leveraging tools and methodologies that typically have been used only at the leading-edge nodes for commercial applications. But as with automotive, the needs of these systems are changing quickly. In addition to strict quality, safety and sec... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys debuted VIP and a UVM source code test suite for IP supporting Ethernet 800G. The VIP supports DesignWare 56G Ethernet, 112G Ethernet, and 112G USR/XSR PHYs for FinFET processes, which can be integrated for 800G implementations based on 8 lane x 100 Gb/s technology. The VIP can switch speed configurations dynamically at run time and includes a customizable set of frame ... » read more

What’s Changing, What Isn’t


The global pandemic is creating economic chaos on a global scale. The big question now is when the coronavirus is brought under control, and just how long its effects will extend beyond the current health crisis. For the semiconductor industry, which has weathered many long and deep financial swings, this one at least is finite. When the virus stops spreading, or when treatments are availabl... » read more

Standard Evolution


I recently had the opportunity to sit down with Lu Dai, chairman of Accellera Systems Initiative and senior director of engineering for Qualcomm. SE: I have noticed a change in the way that Accellera operates these days. In the past, standards were driven by the EDA companies, but recently we have seen a lot more end-user company involvement and they are the companies driving new standards. ... » read more

Physical Verification For Photonics Integrated Circuits


Silicon photonics is a promising solution for the explosive growth of data volume and network traffic in computing and communications. Silicon photonics integrates photonics applications on a silicon wafer, utilizing mainstream Si-based technology. Photonics integrated circuits (PIC) offer several advantages over traditional integrated circuits: faster data transfer speeds, lower power consumpt... » read more

Why It’s So Hard To Create New Processors


The introduction, and initial success, of the RISC-V processor ISA has reignited interest in the design of custom processors, but the industry is now grappling with how to verify them. The expertise and tools that were once in the market have been consolidated into the hands of the few companies that have been shipping processor chips or IP cores over the past 20 years. Verification of a pro... » read more

Making Sense Of EDA And Digital Twins


There is a new buzzword in town, “digital twins.” I have been using it for a while now in the context of system-on-chip (SoC) verification as well as a little more broadly when it comes to security issues for data in general. There are some differences in emphasis across different vertical domains, based on when they are used during the life cycle, which use models are desired and what scop... » read more

Software-Defined Hardware Gains Ground — Again


The traditional approach of running generic software on x86-based CPUs is running out of steam for many applications due to the slowdown of Moore’s Law and the concurrent exponential growth in software application complexity and scale. In this environment, the software and hardware are disparate due the dominance of the x86 architecture. “The need for and advent of the hardware accelerat... » read more

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