category: System-Level Design

category: IoT, Security & Automotive

Interconnects Essential To Heterogeneous Integration
By Karen Heyman - 28 Mar, 2024 - Comments: 0

Designing and manufacturing interconnects is becoming more complex, and more critical to device reliability, as the chip industry shifts from monolithic planar dies to collections of chips and chiplets in a package. What was once as simple as laying down a copper trace has evolved into tens of thousands of microbumps, hybrid bonds, through-silicon vias (TSVs), and even junctions for optical ... » read more

Engineers Or Their Tools: Which Is Responsible For Finding Bugs?
By Ann Mutschler and Adam Kovac - 28 Mar, 2024 - Comments: 0

Experts at the table: Finding and eliminating bugs at the source can be painstaking work, but it can prevent bigger problems later in the design flow, when they are more difficult and expensive to fix.  Semiconductor Engineering sat down to discuss these issues with Ashish Darbari, CEO at Axiomise; Ziyad Hanna, corporate vice president R&D at Cadence; Jim Henson, ASIC verification software... » read more

Rapid Timing Constraints Signoff With Automated Constraint Management
By Rimpy Chugh - 28 Mar, 2024 - Comments: 0

Signoff of a system on chip (SoC) or IP design has multiple aspects, but often timing closure is the most challenging. Early use of a static timing analysis (STA) tool is clearly important, and such a tool must be tied closely into the logic synthesis process to make it more likely that the generated gate-level netlist will meet the desired timing. Power, performance, and area (PPA) goals can o... » read more

A New Strategy For Successful Block/Chip Design-Stage Verification
By David Abercrombie - 28 Mar, 2024 - Comments: 0

Achieving efficiency in integrated circuit (IC) design while maintaining design quality is not just a goal, but a necessity. Designers constantly strive to strike a balance between ever-tightening time-to-market constraints and the finite resources at their disposal, while ensuring the quality of their designs remains uncompromised. Traditionally, IC design flows have been depicted as a linear ... » read more

Data Acquisition Software: The Brains Behind The Hardware
By Bernard Ang - 28 Mar, 2024 - Comments: 0

We have previously talked about how data acquisition systems streamline the testing of various test scenarios. However, the data acquisition (DAQ) hardware is just one-half of the equation. To make the hardware useful for various test scenarios, you need suitable data acquisition software and firmware that can take advantage of that powerful hardware and bridge the gap between your needs and... » read more

Navigating Design Challenges
By Siemens EDA - 28 Mar, 2024 - Comments: 0

Explore the future of IC design with the Calibre Shift left initiative. In this paper, author David Abercrombie reveals how Siemens is changing the game for block/chip design-stage verification by moving Calibre verification and reliability analysis solutions further left in the design flow, including directly inside your P&R tool cockpit. Discover how you can reduce traditional long-loop v... » read more

Jumpstarting The Automotive Chiplet Ecosystem
By Steve Brown - 28 Mar, 2024 - Comments: 0

The automotive industry stands on the cusp of a technological renaissance, ushering in an era where vehicles aren't just tools of transportation, but interconnected nodes within a vast network of software-defined mobility. Central to this transformation is the concept of chiplets—miniaturized, modular components that can be mixed, matched, and scaled to create powerful, application-specific i... » read more

Everything You Need to Know About Wi-Fi 7
By Keysight - 27 Mar, 2024 - Comments: 0

The IEEE 802.11be standard introduces several new features for improving WLAN efficiency, capacity, and coverage. Features such as multi-link operation (MLO) and multiple resource units (multi-RUs) increase the number of configurations and test scenarios to validate a device thoroughly. In addition to physical-layer testing, test engineers must emulate signaling to verify interactions between a... » read more

Leveraging Automotive Chip Design Techniques For Space-Borne Applications
By Synopsys - 27 Mar, 2024 - Comments: 0

Space-borne electronics must operate in an unforgiving environment with harsh conditions and little opportunity to repair failing components. A combination of functionally safe design, RHBD, and robust IP is required. Fortunately, automotive applications share many of the same challenges, and techniques to address these challenges are well established and proven. This white paper surveys the ma... » read more

Sea Of Processors Use Case
By Movellus - 27 Mar, 2024 - Comments: 0

Core counts have been increasing steadily since IBM's debut of the Power 4 in 2001, eclipsing 100 CPU cores and over 1,000 for AI accelerators. While sea of processor architectures feature a stamp and repeat design, per-core workloads aren't always going to be symmetrically balanced. For example, a cloud provider (AI or compute) will rent out individual core clusters to customers for specialize... » read more

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